P60ARM-B/IG/GP1N Zarlink Semiconductor, Inc., P60ARM-B/IG/GP1N Datasheet - Page 44

• Manufacturer Part Number: P60ARM-B/IG/GP1N
• Description: A Low Power, General Purpose 32 Bit RISC Microprocessor
• Manufacturer: Zarlink Semiconductor, Inc.

P60ARM-B
(iii)
Rn and Rm are expressions evaluating to a register number. If Rn is R15 then the assembler will subtract 8
from the offset value to allow for ARM60 pipelining. In this case base write-back shall not be specified.
<shift> is a general shift operation (see section on data processing instructions) but note that the shift
amount may not be specified by a register.
{!} writes back the base register (set the W bit) if ! is present.
4.7.9 Examples
40
[Rn,{+/-}Rm{,<shift>}]{!} offset of +/- contents of index register, shifted by <shift>
A post-indexed addressing specification:
[Rn],<#expression> offset of <expression> bytes
[Rn],{+/-}Rm{,<shift>} offset of +/- contents of index register, shifted as by <shift>.
STR
STR
LDR
LDR
LDREQB
STR
PLACE
R1,[R2,R4]!
R1,[R2],R4
R1,[R2,#16]
R1,[R2,R3,LSL#2]
R1,[R6,#5]
R1,PLACE
•
•
; store R1 at R2+R4 (both of which are
; registers) and write back address to R2
; store R1 at R2 and write back
; R2+R4 to R2
; load R1 from contents of R2+16
;
; load R1 from contents of R2+R3*4
; conditionally load byte at R6+5 into
;
;
; generate PC relative offset to address
;
Don't write back
R1 bits 0 to 7, filling bits 8 to 31
with zeros
PLACE