T7256 Agere Systems, T7256 Datasheet - Page 9

• Manufacturer Part Number: T7256
• Description: (T7234 - T7256) Compliance
• Manufacturer: Agere Systems

Lucent Technologies Inc.
February 1998
Pin Information
Table 1. Pin Descriptions
* I
u
1, 10,
5, 13
Pin
= input with internal pull-up.
16
2
3
4
6
7
SYN8K/LBIND
OPTOIN
Symbol
STLED
ILOSS
GND
V
FTE
DDD
D
(continued)
Type*
—
—
I
O
O
I
I
u
u
u
Digital Ground. Ground leads for digital circuitry.
Optoisolator Input. Pin accepts CMOS logic level maintenance pulse
streams. These pulse streams typically are generated by an optoisolator
that is monitoring the U loop. Pulse patterns on this pin are digitally filtered
for 20 ms before being considered valid and are then decoded and interpret-
ed using the ANSI maintenance state machine requirements. If the OPTOIN
pin is being used for implementing maintenance functions, the ILOSS pin
should not be used (i.e., it should be held high). An internal 100 k pull-up
resistor is on this pin. For applications outside of North America, leave this
pin unconnected.
Status LED Driver. Output pin for driving an LED (source/sink 4.0 mA) that
indicates the device status. The four defined states are low, high,
1 Hz flashing, and 8 Hz flashing (flashing occurs at 50% duty cycle). See the
STLED Description section for a detailed explanation of these states.
Also, this pin indicates device sanity upon power-on/RESET, as follows:
Synchronous 8 kHz Clock or Loopback Indicator. Pin function is select-
ed via SYN8K_CTL (pin 12) state at the end of external RESET. As SYN8K
(SYN8K_CTL = 0), this pin can be used as a reference clock or for synchro-
nization in device performance testing (i.e., it reflects the recovered timing
from the U-interface). SYN8K is always present, even when the chip is in its
low-power (deactivated) mode. As LBIND (SYN8K_CTL = 1), this pin indi-
cates a 2B+D loopback:
Digital Power. 5 V
Insertion Loss Test Control (Active-Low) . The ILOSS pin is used to con-
trol SN1 tone transmission for maintenance. The OPTOIN and ILOSS pins
should not be used at the same time (i.e., OPTOIN should be held high when
ILOSS is active). This pin would typically be used if an external ANSI main-
tenance decoder is being used, in which case the decoder output drives the
ILOSS pin. Internal 100 k pull-up resistor on this pin.
Fixed/Adaptive Timing Mode Select. Selects S/T-interface timing recov-
ery mode:
0—No loopback.
1—eoc requested 2B+D loopback in progress.
0—U transmitter sends SN1 tone continuously.
1—No effect on device operation.
0—Fixed timing recovery mode.
1—Adaptive timing recovery mode.
If AUTOACT = 0 (pin 15) after a device RESET, STLED will toggle at an
8 Hz rate for at least 0.5 s, signifying an activation attempt. If the activa-
tion attempt succeeds, it will continue to flash per the normal start-up
sequence (see STLED Description section).
If AUTOACT = 1 (pin 15) after a device RESET, STLED will go low for 1 s
(flash of life), indicating that the device is operational, and no activation
attempt will be made.
T7234 Single-Chip NT1 (SCNT1) Euro-LITE Transceiver
5% power supply pins for digital circuitry.
Name/Function
5