T7256 Agere Systems, T7256 Datasheet - Page 58

• Manufacturer Part Number: T7256
• Description: (T7234 - T7256) Compliance
• Manufacturer: Agere Systems

T7234 Single-Chip NT1 (SCNT1) Euro-LITE Transceiver
Glossary
SXB1[1:0]:
SXB2[1:0]:
SXD:
SXE:
SYN8K/LBIND/FS: Synchronous 8 kHz clock or loop-
TDM:
TDMB1S:
TDMB1U:
TDMB2S:
TDMB2U:
TDMDS:
TDMDU:
TDMEN:
TDR0:
TNR:
TPR:
TSFINT:
54
(continued)
S/T-interface transmit path source
for B1 channel (register DFR0,
bits 5—4).
S/T-interface transmit path source
for B2 channel (register DFR0,
bits 7—6).
S/T-interface transmit path source
for D channel (register DFR1, bit
1).
S/T-interface D-channel echo bit
control (register GR2, bit 3).
back indicator, frame strobe.
Time-division multiplexed.
TDM bus transmit control for
B1 channel from S/T-interface
(register DFR1, bit 2).
TDM bus transmit control for
B1 channel from U-interface
(register DFR1, bit 5).
TDM bus transmit control for B2
channel from S/T-interface
(register DFR1, bit 3).
TDM bus transmit control for B2
channel from U-interface
(register DFR1, bit 6).
TDM bus transmit control for D
channel from S/T-interface
(register DFR1, bit 4).
TDM bus transmit control for D
channel from U-interface
(register DFR1, bit 7).
TDM bus select (register GR2,
bit 5).
TDM bus timing control register.
Transmit negative rail for
S/T-interface.
Transmit positive rail for
S/T-interface.
Transmit superframe interrupt
(register UIR0, bit 5).
TSFINTM:
U frame:
U2BDLN:
U2BDLT:
UB1LP:
UB2LP:
UINT:
UIR0:
UIR1:
UOA:
UXB1[1:0]:
UXB2[1:0]:
UXD:
V
V
VRCM:
VRN:
VRP:
X1:
X2:
XACT:
XPCY:
DDA
DDO
:
:
Transmit superframe interrupt
mask (register UIR1, bit 5).
An 18-bit synchronous word.
Nontransparent 2B+D loopback
control (register GR2, bit 4).
Transparent 2B+D loopback con-
trol (register ECR0, bit 6).
U-interface loopback of B1 chan-
nel control (register ECR0, bit 4).
U-interface loopback of B2 chan-
nel control (register ECR0, bit 5).
U-transceiver interrupt (register
GIR0, bit 0).
U-interface interrupt register.
U-interface interrupt mask
register.
U-interface only activation,
(register CFR1, bit 3).
U-interface transmit path source
for B1 channel (register DFR0,
bits 1—0).
U-interface transmit path source
for B2 channel (register DFR0,
bits 3—2).
U-interface transmit path source
for D channel (register DFR1,
bit 0).
Analog power.
Crystal oscillator power.
Common-mode voltage reference
for U-interface circuits.
Negative voltage reference for U-
interface circuits.
Positive voltage reference for U-
interface circuits.
Crystal #1.
Crystal #2.
U-transceiver active (register
CFR1, bit 1).
Transparency (register GR1,
bit 5).
Lucent Technologies Inc.
February 1998