MX26F128J3 ETC-unknow, MX26F128J3 Datasheet - Page 8

• Manufacturer Part Number: MX26F128J3
• Description: Macronix Nbit Tm Memory Family 128m [x8/x16] Single 3v Page Mode Eliteflash Tm Memory
• Manufacturer: ETC-unknow

P/N:PM0960
COMMAND DEFINITIONS
Device operations are selected by writing specific address and data sequences into the CUI. Table 3 defines the valid
register command sequences.
When VPEN<VPENLK only read operations from the status register, query, indentifier code or blocks are enabled.
When VPEN=VPENH enables block erase program and lock-bit configuration operations.
Table 3. Command Definitions
Command
Sequence
Notes
Bus Write Cycles Req'd
First Bus
Write Cycles Address(3)
Second Bus Operation(2)
Read Query
Command
Sequence
Notes
Bus Write Cycles Req'd
First Bus
Second Bus Operation(2)
Write Cycle
Write Cycle Address(3)
Operation(2)
Data(4,5)
Address(3)
Data(4,5)
Operation(2)
Data(4,5)
Address(3)
Data(4,5)
Configur-
ation
2
Write
X
B8H
Write
X
CC
FFH
Read
Array
1
Write
X
90H
ID
Read
ID
5
> 2
Write
X
Read
IA
Set Sector
Lock-Bit
2
Write
X
60H
Write
BA
01H
Read
> 2
X
98H
Read
QA
QD
Query
Write
8
Clear
Sector
Lock-Bit
12
2
Write
X
60H
Write
X
D0H
Read
Register Register
6
2
X
70H
Read
X
SRD
Status
Write
Clear
Status
1
X
50H
Write
MX26F128J3
Program
2
Write
X
C0H
Write
PA
PD
Protection
Write to
Buffer
7,8,9
> 2
Write
BA
E8H
Write
BA
N
Word/byte Sector
Program
10,11
2
Write
X
40H/10H
Write
PA
PD
REV. 1.1,OCT. 18, 2004
Erase
9,10
2
Write
BA
20H
Write
BA
D0H