RFPIC12C509AG Microchip Technology Inc., RFPIC12C509AG Datasheet - Page 53

• Manufacturer Part Number: RFPIC12C509AG
• Description: 18/20-pin 8-bit Cmos Microcontroller With Uhf Ask/fsk Transmitter
• Manufacturer: Microchip Technology Inc.

8.6.1
The WDT has a nominal time-out period of 18 ms, (with
no prescaler). If a longer time-out period is desired, a
prescaler with a division ratio of up to 1:128 can be
assigned to the WDT (under software control) by writ-
ing to the OPTION register. Thus, a time-out period of
a nominal 2.3 seconds can be realized. These periods
vary with temperature, V
variations (see DC specs).
FIGURE 8-10:
TABLE 8-6:
©
N/A
Legend: Shaded boxes = Not used by Watchdog Timer, — = unimplemented, read as '0', u = unchanged
Address
2001 Microchip Technology Inc.
Note:
WDT PERIOD
OPTION
T0CS, T0SE, PSA, PS2:PS0 are bits
in the OPTION register.
Name
SUMMARY OF REGISTERS ASSOCIATED WITH THE WATCHDOG TIMER
Configuration
WDT Enable
WATCHDOG TIMER BLOCK DIAGRAM
Watchdog
Timer
DD
GPWU
Bit 7
and part-to-part process
From Timer0 Clock Source
(Figure 8-5)
GPPU
Bit 6
T0CS
1
0
Bit 5
PSA
M
U
X
Preliminary
T0SE
Bit 4
rfPIC12C509AG/509AF
Bit 3
PSA
0
Under worst case conditions (V
= Max., max. WDT prescaler), it may take several sec-
onds before a WDT time-out occurs.
8.6.2
The CLRWDT instruction clears the WDT and the
postscaler, if assigned to the WDT, and prevents it from
timing out and generating a device RESET.
The SLEEP instruction RESETS the WDT and the
postscaler, if assigned to the WDT. This gives the max-
imum SLEEP time before a WDT wake-up Reset.
Time-out
8 - to - 1 MUX
WDT
MUX
Postscaler
Postscaler
Bit 2
PS2
1
Bit 1
WDT PROGRAMMING
CONSIDERATIONS
PS1
PSA
To Timer0 (Figure 8-4)
Bit 0
PS0
PS2:PS0
1111 1111
Power-on
Value on
Reset
DD
= Min., Temperature
DS70031A-page 51
1111 1111
All Other
Value on
RESETS