RFPIC12C509AG Microchip Technology Inc., RFPIC12C509AG Datasheet - Page 29

• Manufacturer Part Number: RFPIC12C509AG
• Description: 18/20-pin 8-bit Cmos Microcontroller With Uhf Ask/fsk Transmitter
• Manufacturer: Microchip Technology Inc.

6.0
The Timer0 module has the following features:
• 8-bit timer/counter register, TMR0
• 8-bit software programmable prescaler
• Internal or external clock select
Figure 6-1 is a simplified block diagram of the Timer0
module.
Timer mode is selected by clearing the T0CS bit
(OPTION<5>). In timer mode, the Timer0 module will
increment every instruction cycle (without prescaler). If
TMR0 register is written, the increment is inhibited for
FIGURE 6-1:
©
- Readable and writable
- Edge select for external clock
2001 Microchip Technology Inc.
GP2/T0CKI
TIMER0 MODULE AND TMR0
REGISTER
Pin
T0SE
Note 1: Bits T0CS, T0SE, PSA, PS2, PS1 and PS0 are located in the OPTION register.
F
TIMER0 BLOCK DIAGRAM
OSC
2: The prescaler is shared with the Watchdog Timer (Figure 6-5).
/4
T0CS
0
1
(1)
PS2, PS1, PS0
Programmable
Prescaler
Preliminary
3
(2)
(1)
rfPIC12C509AG/509AF
the following two instruction cycles (Figure 6-2 and
Figure 6-3). The user can work around this by writing
an adjusted value to the TMR0 register.
Counter mode is selected by setting the T0CS bit
(OPTION<5>). In this mode, Timer0 will increment
either on every rising or falling edge of pin T0CKI. The
T0SE bit (OPTION<4>) determines the source edge.
Clearing the T0SE bit selects the rising edge. Restric-
tions on the external clock input are discussed in detail
in Section 6.1.
The prescaler may be used by either the Timer0 mod-
ule or the Watchdog Timer, but not both. The prescaler
assignment is controlled in software by the control bit
PSA (OPTION<3>). Clearing the PSA bit will assign the
prescaler to Timer0. The prescaler is not readable or
writable. When the prescaler is assigned to the Timer0.
PSA
1
0
(1)
PSout
(2 T
Sync with
Internal
Clocks
CY
delay)
PSout
Sync
TMR0 reg
Data bus
DS70031A-page 27
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