RFPIC12C509AG Microchip Technology Inc., RFPIC12C509AG Datasheet - Page 17
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RFPIC12C509AG
Manufacturer Part Number
RFPIC12C509AG
Description
18/20-pin 8-bit Cmos Microcontroller With Uhf Ask/fsk Transmitter
Manufacturer
Microchip Technology Inc.
Datasheet
1.RFPIC12C509AG.pdf
(104 pages)
- Current page: 17 of 104
- Download datasheet (2Mb)
4.0
rfPIC12C509AG/509AF memory is organized into pro-
gram memory and data memory. For devices with more
than 512 bytes of program memory, a paging scheme
is used. Program memory pages are accessed using
one STATUS register bit. For the rfPIC12C509AG/
509AF, with a data memory register file of more than 32
registers, a banking scheme is used. Data memory
banks are accessed using the File Select Register
(FSR).
4.1
The rfPIC12C509AG/509AF devices have a 12-bit Pro-
gram Counter (PC) capable of addressing a 2K x 12
program memory space.
Only the first 1K x 12 (0000h-03FFh) for the
rfPIC12C509AG/509AF is physically implemented.
Refer to Figure 4-1. Accessing a location above these
boundaries will cause a wrap-around within the first 1K
x 12 space. The effective RESET vector is at 000h,
(see Figure 4-1). Location 03FFh contains the internal
clock oscillator calibration value. This value should
never be overwritten.
©
2001 Microchip Technology Inc.
MEMORY ORGANIZATION
Program Memory Organization
Preliminary
rfPIC12C509AG/509AF
FIGURE 4-1: PROGRAM MEMORY MAP AND
Note 1: Address 0000h becomes the
CALL, RETLW
effective RESET vector. Location
03FFh contains the MOVLW XX
INTERNAL RC oscillator calibra-
tion value.
STACK
RESET Vector (note 1)
On-chip Program
On-chip Program
Stack Level 1
Stack Level 2
1024 Word
PC<11:0>
512 Word
Memory
Memory
12
DS70031A-page 15
7FFh
0000h
01FFh
0200h
03FFh
0400h
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