RFPIC12C509AG Microchip Technology Inc., RFPIC12C509AG Datasheet - Page 50

• Manufacturer Part Number: RFPIC12C509AG
• Description: 18/20-pin 8-bit Cmos Microcontroller With Uhf Ask/fsk Transmitter
• Manufacturer: Microchip Technology Inc.

programmed, the MCLR function is tied to the internal
V
MCLR, the internal pull-up is always on.
resistor to V
rfPIC12C509AG/509AF
8.3.1
This configuration bit when unprogrammed (left in the
‘1’ state) enables the external MCLR function. When
Figure 8-5. When pin GP3/MCLR/V
FIGURE 8-5:
8.4
The rfPIC12C509AG/509AF incorporates
Power-on Reset (POR) circuitry which provides an
internal chip RESET for most power-up situations.
The on-chip POR circuit holds the chip in RESET until
V
ation. To take advantage of the internal POR, program
the GP3/MCLR/V
weak pull-up resistor is implemented using a transistor.
Refer to Table 11-1 for the pull-up resistor ranges. This
will eliminate external RC components usually needed
to create a Power-on Reset. A maximum rise time for
V
details.
When the device starts normal operation (exits the
RESET condition), device operating parameters (volt-
age, frequency, temperature,...) must be met to ensure
operation. If these conditions are not met, the device
must be held in RESET until the operating parameters
are met.
A simplified block diagram of the on-chip Power-on
Reset circuit is shown in Figure 8-6.
DS70031A-page 48
DD
DD
DD
, and the pin is assigned to be a GPIO. See
has reached a high enough level for proper oper-
is specified. See Electrical Specifications for
Power-On Reset (POR)
GP3/MCLR/V
MCLR ENABLE
DD
or program the pin as GP3. An internal
WEAK
PULL-UP
PP
PP
pin as MCLR and tie through a
MCLRE
MCLR SELECT
PP
is configured as
INTERNAL MCLR
on-chip
Preliminary
The Power-on Reset circuit and the Device Reset
Timer (Section 8.5) circuit are closely related. On
power-up, the RESET latch is set and the DRT is
RESET. The DRT timer begins counting once it detects
MCLR to be high. After the time-out period, which is
typically 18 ms, it will RESET the RESET latch and thus
end the on-chip RESET signal.
A power-up example where MCLR is held low is shown
in Figure 8-7. V
bringing MCLR high. The chip will actually come out of
RESET T
In Figure 8-8, the on-chip Power-on Reset feature is
being used (MCLR and V
is programmed to be GP3.). The V
the start-up timer times out and there is no problem in
getting a proper RESET. However, Figure 8-9 depicts a
problem situation where V
between when the DRT senses that MCLR is high and
when MCLR (and V
too long. In this situation, when the start-up timer times
out, V
chip is, therefore, not guaranteed to function correctly.
For such situations, we recommend that external RC
circuits be used to achieve longer POR delay times
(Figure 8-8).
For additional information refer to Application Notes
“ Power-Up Considerations” - AN522 and “ Power-up
Trouble Shooting ” - AN607.
Note:
DD
has not reached the V
DRT
When the device starts normal operation
(exits the RESET condition), device oper-
ating parameters (voltage, frequency, tem-
perature, etc.) must be met to ensure
operation. If these conditions are not met,
the device must be held in RESET until the
operating conditions are met.
msec after MCLR goes high.
DD
is allowed to rise and stabilize before
DD
) actually reach their full value, is
©
DD
2001 Microchip Technology Inc.
DD
are tied together or the pin
rises too slowly. The time
DD
(min) value and the
DD
is stable before