DSPIC30F5013 Microchip Technology Inc., DSPIC30F5013 Datasheet - Page 145

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DSPIC30F5013

Manufacturer Part Number
DSPIC30F5013
Description
Dspic30f5011/5013 High-performance Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet

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20.2.4
The PLL multiplies the clock which is generated by the
primary oscillator or Fast RC oscillator. The PLL is
selectable to have gains of x4, x8, and x16. Input and
output frequency ranges are summarized in
Table 20-3.
TABLE 20-3:
The PLL features a lock output which is asserted when
the PLL enters a phase locked state. Should the loop
fall out of lock (e.g., due to noise), the lock signal will be
rescinded. The state of this signal is reflected in the
read-only LOCK bit in the OSCCON register.
20.2.5
The FRC oscillator is a fast (7.37 MHz ±2% nominal)
internal RC oscillator. This oscillator is intended to pro-
vide reasonable device operating speeds without the
use of an external crystal, ceramic resonator, or RC
network. The FRC oscillator can be used with the PLL
to obtain higher clock frequencies.
The dsPIC30F operates from the FRC oscillator when-
ever the current oscillator selection control bits in the
OSCCON register (OSCCON<13:12>) are set to ‘01’.
The four bit field specified by TUN<3:0> (OSCCON
<15:14> and OSCCON<11:10>) allows the user to tune
the internal fast RC oscillator (nominal 7.37 MHz). The
user can tune the FRC oscillator within a range of
+10.5% (840 kHz) and -12% (960 kHz) in steps of
1.50% around the factory-calibrated setting (see
Table 20-4).
If OSCCON<13:12> are set to ‘11’ and FPR<3:0> are
set to ‘0001’, ‘1010’ or ‘0011’, then a PLL multiplier of
4, 8 or 16 (respectively) is applied.
© 2006 Microchip Technology Inc.
Note:
4 MHz-7.5 MHz
4 MHz-10 MHz
4 MHz-10 MHz
F
IN
PHASE LOCKED LOOP (PLL)
FAST RC OSCILLATOR (FRC)
When a 16x PLL is used, the FRC fre-
quency must not be tuned to a frequency
greater than 7.5 MHz.
PLL FREQUENCY RANGE
Multiplier
PLL
x16
x4
x8
64 MHz-120 MHz
16 MHz-40 MHz
32 MHz-80 MHz
F
OUT
TABLE 20-4:
20.2.6
The LPRC oscillator is a component of the Watchdog
Timer (WDT) and oscillates at a nominal frequency of
512 kHz. The LPRC oscillator is the clock source for
the Power-up Timer (PWRT) circuit, WDT and clock
monitor circuits. It can also be used to provide a low
frequency clock source option for applications where
power consumption is critical and timing accuracy is
not required
The LPRC oscillator is always enabled at a Power-on
Reset because it is the clock source for the PWRT.
After the PWRT expires, the LPRC oscillator remains
on if one of the following conditions is true:
• The Fail-Safe Clock Monitor is enabled
• The WDT is enabled
• The LPRC oscillator is selected as the system
If one of the above conditions is not true, the LPRC
shuts off after the PWRT expires.
clock via the COSC<1:0> control bits in the
OSCCON register
TUN<3:0>
Note 1: OSC2 pin function is determined by the
dsPIC30F5011/5013
0111
0110
0101
0100
0011
0010
0001
0000
1111
1110
1101
1100
1011
1010
1001
1000
Bits
2: OSC1 pin cannot be used as an I/O pin
LOW-POWER RC OSCILLATOR
(LPRC)
Primary
(FPR<3:0>).
even if the secondary oscillator or an
internal clock source is selected at all
times.
Center Frequency (oscillator is
running at calibrated frequency)
FRC TUNING
Oscillator
FRC Frequency
+ 10.5%
+ 9.0%
+ 7.5%
+ 6.0%
+ 4.5%
+ 3.0%
+ 1.5%
- 1.5%
- 3.0%
- 4.5%
- 6.0%
- 7.5%
- 9.0%
- 10.5%
- 12.0%
DS70116F-page 143
mode
selection

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