DSPIC30F5013 Microchip Technology Inc., DSPIC30F5013 Datasheet - Page 136

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DSPIC30F5013

Manufacturer Part Number
DSPIC30F5013
Description
Dspic30f5011/5013 High-performance Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet

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dsPIC30F5011/5013
FIGURE 19-3:
19.8
The analog input model of the 12-bit ADC is shown in
Figure 19-4. The total sampling time for the ADC is a
function of the internal amplifier settling time and the
holding capacitor charge time.
For the ADC to meet its specified accuracy, the charge
holding capacitor (C
charge to the voltage level on the analog input pin. The
source impedance (R
(R
FIGURE 19-4:
DS70116F-page 134
IC
Instruction Execution BSET ADCON1, ASAM
), and the internal sampling switch (R
ADCBUF0
ADCBUF1
ADCLK
ADC Acquisition Requirements
DONE
SAMP
Note: C
Legend: C
VA
PIN
HOLD
Rs
S
value depends on device package and is not tested. Effect of C
CONVERTING 1 CHANNEL AT 200 KSPS, AUTO-SAMPLE START, 1 T
SAMPLING TIME
12-BIT ADC ANALOG INPUT MODEL
), the interconnect impedance
V
I leakage
R
R
C
ANx
) must be allowed to fully
T
PIN
IC
SS
HOLD
C
PIN
= 1 T
T
SAMP
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch resistance
= sample/hold capacitance (from DAC)
AD
various junctions
V
DD
SS
V
) imped-
V
T
T
= 0.6V
= 0.6V
= 14 T
T
CONV
AD
R
I leakage
= 1 T
T
IC
SAMP
500 nA
AD
250
ance combine to directly affect the time required to
charge the capacitor C
of the analog sources must therefore be small enough
to fully charge the holding capacitor within the chosen
sample time. To minimize the effects of pin leakage
currents on the accuracy of the ADC, the maximum
recommended source impedance, R
the analog input channel is selected (changed), this
sampling function must be completed prior to starting
the conversion. The internal holding capacitor will be in
a discharged state prior to each sample operation.
Sampling
Switch
R
SS
= 14 T
PIN
T
CONV
R
negligible if Rs
SS
V
AD
SS
C
= DAC capacitance
= 18 pF
HOLD
HOLD
3 k
© 2006 Microchip Technology Inc.
. The combined impedance
2.5 k .
S
, is 2.5 k . After
AD

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