DSPIC33FJ64MC508 Microchip Technology Inc., DSPIC33FJ64MC508 Datasheet - Page 271
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DSPIC33FJ64MC508
Manufacturer Part Number
DSPIC33FJ64MC508
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet
1.DSPIC33FJ64MC508.pdf
(342 pages)
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FIGURE 22-2:
22.5
dsPIC33FJXXXMCX06/X08/X10 Motor Control Family
devices implement a JTAG interface, which supports
boundary scan device testing, as well as in-circuit pro-
gramming. Detailed information on the interface will be
provided in future revisions of the document.
22.6
The dsPIC33F product families offer the advanced
implementation of CodeGuard™ Security. CodeGuard
Security enables multiple parties to securely share
resources (memory, interrupts and peripherals) on a
single chip. This feature helps protect individual
Intellectual Property in collaborative system designs.
When coupled with software encryption libraries, Code-
Guard™ Security can be used to securely update Flash
even when multiple IP are resident on the single chip.
The code protection features vary depending on the
actual dsPIC33F implemented. The following sections
provide an overview of these features.
The code protection features are controlled by the
Configuration registers: FBS, FSS and FGS.
22.7
dsPIC33FJXXXMCX06/X08/X10 Motor Control Family
family digital signal controllers can be serially pro-
grammed while in the end application circuit. This is
© 2007 Microchip Technology Inc.
All Device Resets
Transition to New Clock Source
Exit Sleep or Idle Mode
PWRSAV Instruction
CLRWDT Instruction
SWDTEN
FWDTEN
LPRC Clock
Note:
JTAG Interface
Code Protection and
CodeGuard™ Security
In-Circuit Serial Programming
Refer
Reference Manual (DS70180) for further
information on usage, configuration and
operation of CodeGuard Security.
WINDIS
dsPIC33FJXXXMCX06/X08/X10 MOTOR CONTROL FAMILY
to
WDT BLOCK DIAGRAM
the
CodeGuard
(divide by N1)
WDTPRE
Prescaler
Security
RS
WDT Window Select
Watchdog Timer
RS
simply done with two lines for clock and data and three
other lines for power, ground and the programming
sequence. This allows customers to manufacture
boards with unprogrammed devices and then program
the digital signal controller just before shipping the
product. This also allows the most recent firmware or a
custom firmware, to be programmed. Please refer to
the “dsPIC33F Flash Programming Specification”
(DS70152) document for details about ICSP.
Any 1 out of 3 pairs of programming clock/data pins
may be used:
• PGC1/EMUC1 and PGD1/EMUD1
• PGC2/EMUC2 and PGD2/EMUD2
• PGC3/EMUC3 and PGD3/EMUD3
22.8
When MPLAB
in-circuit debugging functionality is enabled. This func-
tion allows simple debugging functions when used with
MPLAB IDE. Debugging functionality is controlled
through the EMUCx (Emulation/Debug Clock) and
EMUDx (Emulation/Debug Data) pin functions.
Any 1 out of 3 pairs of debugging clock/data pins may
be used:
• PGC1/EMUC1 and PGD1/EMUD1
• PGC2/EMUC2 and PGD2/EMUD2
• PGC3/EMUC3 and PGD3/EMUD3
To use the in-circuit debugger function of the device,
the design must implement ICSP connections to
MCLR, V
pin pair. In addition, when the feature is enabled, some
of the resources are not available for general use.
These resources include the first 80 bytes of data RAM
and two I/O pins.
WDTPOST<3:0>
(divide by N2)
Postscaler
CLRWDT Instruction
In-Circuit Debugger
DD
, V
®
SS
ICD 2 is selected as a debugger, the
, PGC, PGD and the EMUDx/EMUCx
Sleep/Idle
1
0
DS70287A-page 269
WDT
Wake-up
WDT
Reset
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