DSPIC33FJ64MC508 Microchip Technology Inc., DSPIC33FJ64MC508 Datasheet - Page 132
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DSPIC33FJ64MC508
Manufacturer Part Number
DSPIC33FJ64MC508
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet
1.DSPIC33FJ64MC508.pdf
(342 pages)
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dsPIC33FJXXXMCX06/X08/X10 MOTOR CONTROL FAMILY
REGISTER 7-2:
DS70287A-page 130
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-7
bit 6-0
Note 1:
FORCE
R/W-0
U-0
—
2:
(1)
The FORCE bit cannot be cleared by the user. The FORCE bit is cleared by hardware when the forced
DMA transfer is complete.
Please see Table 6-1 for a complete listing of IRQ numbers for all interrupt sources.
FORCE: Force DMA Transfer bit
1 = Force a single DMA transfer (Manual mode)
0 = Automatic DMA transfer initiation by DMA request
Unimplemented: Read as ‘0’
IRQSEL<6:0>: DMA Peripheral IRQ Number Select bits
0000000-1111111 = DMAIRQ0-DMAIRQ127 selected to be Channel DMAREQ
IRQSEL6
R/W-0
U-0
—
DMAxREQ: DMA CHANNEL x IRQ SELECT REGISTER
(2)
W = Writable bit
‘1’ = Bit is set
IRQSEL5
R/W-0
U-0
—
(2)
IRQSEL4
R/W-0
(1)
U-0
—
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
IRQSEL3
U-0
U-0
—
(2)
(2)
IRQSEL2
U-0
U-0
—
(2)
© 2007 Microchip Technology Inc.
x = Bit is unknown
IRQSEL1
R/W-0
U-0
—
(2)
IRQSEL0
R/W-0
U-0
—
bit 8
bit 0
(2)
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