HT46RU22 Holtek Semiconductor Inc., HT46RU22 Datasheet - Page 7

• Manufacturer Part Number: HT46RU22
• Description: Ht46ru22 -- A/d Type 8-bit Mcu
• Manufacturer: Holtek Semiconductor Inc.

Program Memory - ROM
The program memory is used to store the program in-
structions which are to be executed. It also contains
data, table, and interrupt entries, and is organized into
2048 14 bits, addressed by the program counter and ta-
ble pointer.
Certain locations in the program memory are reserved
for special usage:
Note:
Rev. 1.20
TABRDC [m]
TABRDL [m]
Location 000H
This area is reserved for program initialization. After
chip reset, the program always begins execution at lo-
cation 000H.
Location 004H
This area is reserved for the external interrupt service
program. If the INT input pin is activated, the interrupt
is enabled and the stack is not full, the program begins
execution at location 004H.
Location 008H
This area is reserved for the timer/event counter inter-
rupt service program. If a timer interrupt results from a
timer/event counter overflow, and if the interrupt is en-
abled and the stack is not full, the program begins exe-
cution at location 008H.
Location 00CH
This area is reserved for the A/D converter interrupt
service program. If an A/D converter interrupt results
from an end of A/D conversion, and if the interrupt is
enabled and the stack is not full, the program begins
execution at location 00CH.
Location 010H
This area is reserved for the I
program. If the I
address is match or completed 1 byte of data transfer,
and if the interrupt is enable and the stack is not full,
the program begins execution at location 010H.
Location 014H
This area is reserved for the UART interrupt service
program. If the UART interrupt resulting from trans-
mission/reception is completed, and if the interrupt is
enable and the stack is not full, the program begins
execution at location 014H.
Table location
Any location in the ROM space can be used as
look-up tables. The instructions TABRDC [m] (the
Instruction
*10~*0: Table location bits
@7~@0: Table pointer bits
2
C Bus interrupt resulting from a slave
P10
*10
1
P9
*9
1
2
C Bus interrupt service
P8
*8
1
@7
@7
*7
Table Location
@6
@6
*6
7
Table Location
P10~P8: Current program counter bits
current page, 1 page=256 words) and TABRDL [m]
(the last page) transfer the contents of the lower-order
byte to the specified data memory, and the higher-or-
der byte to TBLH (08H). Only the destination of the
lower-order byte in the table is well-defined, the other
bits of the table word are transferred to the lower por-
tion of TBLH, and the remaining 2 bit is read as 0 .
The Table Higher-order byte register (TBLH) is read
only. The table pointer (TBLP) is a read/write register
(07H), which indicates the table location. Before ac-
cessing the table, the location must be placed in
TBLP. The TBLH is read only and cannot be restored.
If the main routine and the ISR (Interrupt Service Rou-
tine) both employ the table read instruction, the con-
tents of the TBLH in the main routine are likely to be
changed by the table read instruction used in the ISR.
Errors can occur. In other words, using the table read
instruction in the main routine and the ISR simulta-
neously should be avoided. However, if the table read
instruction has to be applied in both the main routine
and the ISR, the interrupt is supposed to be disabled
prior to the table read instruction. It will not be enabled
until the TBLH has been backed up. All table related
instructions require two cycles to complete the opera-
tion. These areas may function as normal program
memory depending upon the requirements.
@5
@5
*5
@4
@4
*4
Program Memory
@3
@3
*3
@2
@2
*2
HT46RU22
@1
@1
March 23, 2007
*1
@0
@0
*0