HT46RU22 Holtek Semiconductor Inc., HT46RU22 Datasheet - Page 21

• Manufacturer Part Number: HT46RU22
• Description: Ht46ru22 -- A/d Type 8-bit Mcu
• Manufacturer: Holtek Semiconductor Inc.

Bit 7 of the ACSR register is used for test purposes only and must not be used for other purposes by the application pro-
gram. Bit1 and bit0 of the ACSR register are used to select the A/D clock source.
When the A/D conversion has completed, the A/D interrupt request flag will be set. The EOCB bit is set to 1 when the
START bit is set from 0 to 1 .
Important Note for A/D initialization:
Special care must be taken to initialize the A/D converter each time the Port B A/D channel selection bits are modified,
otherwise the EOCB flag may be in an undefined condition. An A/D initialization is implemented by setting the START
bit high and then clearing it to zero within 10 instruction cycles of the Port B channel selection bits being modified. Note
that if the Port B channel selection bits are all cleared to zero then an A/D initialization is not required.
Note:
The following two programming examples illustrate how to setup and implement an A/D conversion. In the first exam-
ple, the method of polling the EOCB bit in the ADCR register is used to detect when the conversion cycle is complete,
whereas in the second example, the A/D interrupt is used to determine when the conversion is complete.
Example: using EOCB Polling Method to detect end of conversion
Start_conversion:
Polling_EOC:
Example: using interrupt method to detect end of conversion
Rev. 1.20
Register
clr
mov
mov
mov
mov
clr
set
clr
sz
jmp
mov
mov
mov
mov
jmp
clr
mov
mov
mov
mov
ADRH
ADRL
D0~D8 is A/D conversion result data bit LSB~MSB.
EADI
a,00000001B
ACSR,a
a,00100000B
ADCR,a
:
:
:
START
START
START
EOCB
polling_EOC
a,ADRH
adrh_buffer,a
a,ADRL
adrl_buffer,a
:
:
start_conversion
EADI
a,00000001B
ACSR,a
a,00100000B
ADCR,a
:
Bit7
D0
D8
Bit6
D7
; disable ADC interrupt
; setup the ACSR register to select f
; setup ADCR register to configure Port PB0~PB3 as A/D inputs
; and select AN0 to be connected to the A/D converter
; reset A/D
; start A/D
; poll the ADCR register EOCB bit to detect end of A/D conversion
; continue polling
; read conversion result high byte value from the ADRH register
; save result to user defined memory
; read conversion result low byte value from the ADRL register
; save result to user defined memory
; start next A/D conversion
; disable ADC interrupt
; setup the ACSR register to select f
; setup ADCR register to configure Port PB0~PB3 as A/D inputs
; and select AN0 to be connected to the A/D converter
; As the Port B channel bits have changed the following START
; signal (0-1-0) must be issued within 10 instruction cycles
; As the Port B channel bits have changed the following START
; signal (0-1-0) must be issued within 10 instruction cycles
ADRL (24H), ADRH (25H) Register
Bit5
D6
21
Bit4
D5
Bit3
D4
SYS
SYS
/8 as the A/D clock
/8 as the A/D clock
Bit2
D3
Bit1
D2
HT46RU22
March 23, 2007
Bit0
D1