LMX2364 National Semiconductor Corporation, LMX2364 Datasheet - Page 25

• Manufacturer Part Number: LMX2364
• Description: 2.6 Ghz Pllatinum Fractional Rf Frequency Synthesizer With 850 Mhz Integer If Frequency Synthesizer
• Manufacturer: National Semiconductor Corporation

Reg
R0
Programming Description
2.3 R0 REGISTER
2.3.1 IF_R[14:0] — R Divider Ratio, IF Synthesizer
The R0 control word is used to configure the 15 Bit R Divider for the IF Synthesizer. Divide ratios ranging from 3 to 32,767 are
supported.
2.3.2 IF_CPP — Charge Pump Polarity, IF Synthesizer
This bit controls the polarity of phase detector for the IF synthesizer. It should be set to “1” when the IF VCO has positive tuning
gain, and “0” when the tuning gain is negative.
2.3.3 IF_CP — Charge Pump Gain, IF Synthesizer
This bit controls the charge pump gain for the IF Synthesizer. Set this bit to 0 for low gain mode (100 uA) and a 1 for high gain
mode (800 uA). When FastLock mode is enabled, the charge pump gain is controlled by the FastLock circuit.
2.3.4 IF_RST — Counter Reset, IF Synthesizer
The IF Counter Reset enable bit when activated (IF_RST = 1) allows the reset of both the IF N and R dividers and sets the IF
charge pump to a TRI-STATE condition
counter. The maximum error is one prescaler cycle.
32,767
Divide
Ratio
3
4
•
23
0
22
0
14
0
0
1
•
21
0
13
RST
0
0
1
•
IF_
20
IF_
CP
19
12
0
0
1
•
CPP
IF_
18
11
0
0
1
•
17
®
. Upon powering up, the N counter resumes counting in "close" alignment with the R
16
10
0
0
1
•
(Continued)
15
9
0
0
1
•
14
DATA[20:0]
13
8
0
0
1
•
12
IF_R[14:0]
25
7
0
0
1
•
11
IF_R[14:0]
10
6
0
0
1
•
9
5
0
0
1
•
8
7
4
0
0
1
•
6
3
0
0
1
•
5
4
2
0
1
1
•
3
1
1
0
1
•
C2
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2
0
C1
1
0
0
1
0
1
•
C0
0
0