LMX2364 National Semiconductor Corporation, LMX2364 Datasheet - Page 28

• Manufacturer Part Number: LMX2364
• Description: 2.6 Ghz Pllatinum Fractional Rf Frequency Synthesizer With 850 Mhz Integer If Frequency Synthesizer
• Manufacturer: National Semiconductor Corporation

www.national.com
Reg
R3
Programming Description
2.6 R3 REGISTER
The R3 register is used to setup the RF R Divider ratio as well as several other control functions related to the RF synthesizer.
2.6.1 RF_FD[6:0] — Fractional Denominator, RF Synthesizer
In Fractional Mode, RF_FD[6:0] is used to specify the fractional denominator of the fractional part of the N counter value. Note
that in this mode, values below 32 are not supported. If a fractional denominator between 2 and 32 is desired, the same N counter
value can be achieved by multiplying the fractional numerator and denominator by some constant factor. For instance, 1/16 can
be expressed as 5/80.
In integer mode, the value represented by this bit multiplies both the RF_N and RF_R counter values. If both of these counter
sizes are sufficiently large, it is recommended to set this bit to one. If the counter sizes are too small, this bit can be used to extend
the counter range.
See R divider programming (section 2.6.2 ) and N divider programming (Section 2.7.2) for more detailed programming
information.
2.6.2 RF_R[8:0] — R Divider Ratio, RF Synthesizer
RF_R[8:0] is used to specify an integer value from 1 to 511 that is used in calculating the R divider ratio for the RF synthesizer.
In the case that the PLL is operating in fractional mode, the R counter value is simply the value represented by RF_R. However,
in integer mode, the R counter value is calculated by multiplying RF_R by the fractional denominator value.
Since RF_R can take on integer values between 1 – 511 and RF_FD can take on integer values between 1 – 128, this value can
range from 1 - 65408, although prime values between 512 and 65,408 can not be realized.
RST
RF_
23
RF_
22
P
Complete N Divider Value
CPP
RF_
21
R Divider Value
20
CP[1:0]
Value
RF_
19
RF_FD[6:0]
18
127
32
33
34
…
…
0
1
17
16
Integer Mode
[RF_OM = 0]
R (Integer Mode) = RF_R x RF_FD
(Continued)
15
128
127
…
32
33
34
…
RF_R[8:0]
1
RF_R[8:0]
14
RF_N x RF_FN/RF_FD
DATA[20:0]
511
…
0
1
Fractional Mode
13
(RF_OM=1)
Not Supported (Use Integer Mode Instead)
RF_R
12
28
Not Supported ( Use a higher value )
Not Supported
11
RF_FD
Value
RF_R
Value
511
…
1
Fractional Mode
10
RF_OM = 1
128
127
32
33
34
…
9
8
7
RF_FD[6:0]
RF_N x RF_FD + RF_FN
6
RF_R x RF_FD
Integer Mode
(RF_OM=0)
5
4
3
C2
2
0
C1
1
1
C0
0
1