XA-SCC NXP Semiconductors, XA-SCC Datasheet - Page 38

• Manufacturer Part Number: XA-SCC
• Description: Cmos 16-bit Communications Microcontroller
• Manufacturer: NXP Semiconductors

Philips Semiconductors
1999 Feb 23
CMOS 16-bit communications microcontroller
ClkOut
D7–D0
CASL
RAS
RAS (CS)
t
OE
CLKOUT
CHAV
A
CASL
D[7:0]
WE
A
4 Byte Fetch is shown on 8 bit bus, burst can be 2 to 16 bytes.
NOTE 4: To meet hold time, EDO DRAM drives Data until OE rises, or until a new falling edge of CAS.
Data Bus is sampled on rising edge of clock 6, and every 2 clocks thereafter (clocks 6, 8, 10, and 12 in this example).
1
NOTE 3
DRIVEN
BY XA
RAS ADDRESS
t
t
CHSL
t
CHSL
2
CHAH
t
CHAV
t
AVSL
t
AVSL
RAS ADDRESS
t
CHSL
DRIVEN BY SLAVE
t
AVSL
3
Figure 22. DRAM 16 Bit Write on 8 Bit Bus (FPM or EDO DRAMs)
t
CHAV
CAS ADDR
(EVEN)
Figure 21. EDO DRAM Burst Code Fetch on 8 Bit Bus
t
CHSH
4
t
DVSL
t
CHSL
t
CHAH
t
CHSL
t
AVSL
5
t
LS BYTE
DIS
CAS ADDRESS (EVEN)
LS BYTE
CAS ADDR
(ODD)
6
t
CPWL
38
NOTE 4
t
CHAH
7
MS BYTE
t
CHAV
t
CPWH
CAS ADDR
(EVEN)
8
t
CHSH
t
CPWH
9
LS BYTE
CAS ADDRESS (ODD)
t
DVSL
CAS ADDR
MS BYTE
(ODD)
10
t
NOTE 4
CHAH
t
CHSH
t
t
CHSH
CHSH
11
MS BYTE
t
Preliminary specification
CHAV
SU01143
XA-SCC
12
SU01142
t
OHDE