XA-SCC NXP Semiconductors, XA-SCC Datasheet - Page 26

• Manufacturer Part Number: XA-SCC
• Description: Cmos 16-bit Communications Microcontroller
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 6. SCC0 Interrupts (Interrupt structure is the same except for bit locations for all 4 SCCs)
EXCEPTION/TRAPS PRECEDENCE
1999 Feb 23
Rx Character Available
SDLC EOF
CRC/Framing Error
Rx Overrun
Parity Error
Tx Buffer Empty
Break/Abort
Tx Underrun/EOM
CTS
SYNC/HUNT
DCD
Zero Count
Reset (h/w, watchdog, s/w)
Breakpoint
Trace
Stack Overflow
Divide by 0
User RETI
TRAP 0–15 (software)
Potential SCC0 Interrupt
CMOS 16-bit communications microcontroller
DESCRIPTION
WR1[2]
See WR1[1]
Break/Abort IE
WR15[7]
Tx Underrun/EOM IE
WR15[6]
CTS IE
WR15[5]
SYNC/HUNT IE
WR15[4]
DCD IE
WR15[3]
Zero Count IE
WR15[1]
Individual Enable Bit
MMR Hex Offset
–
–
–
–
RR0[0]
RR1[7]
RR1[6]
RR1[5]
RR1[4]
RR0[2]
RR0[7]
RR0[6]
RR0[5]
RR0[4]
RR0[3]
RR0[1]
Source Bit
MMR Hex
Offset
VECTOR ADDRESS
000C–000F
0008–000B
0040–007F
0000–0003
0004–0007
0010–0013
0014–0017
WR1[4:3]
Tx Interrupt Enable
WR1[1]
Master External/ Status
Interrupt Enable
Interru t Enable
WR1[0]
26
Group Enable Bit(s)
MMR Hex Offset
Group Flag Bit MMR
Even Channel Rx IP
RR3[5]
Even Channel Tx IP
RR3[4]
Even Channel
External/Status IP
External/Status IP
RR3[3]
Hex Offset
ARBITRATION RANKING
0 (High)
1
1
1
1
1
1
Preliminary specification
SCC0/1 Master
Interrupt Enable
WR9[3]
Master Enable Bit
MMR Hex Offset
XA-SCC