XA-SCC NXP Semiconductors, XA-SCC Datasheet - Page 15

• Manufacturer Part Number: XA-SCC
• Description: Cmos 16-bit Communications Microcontroller
• Manufacturer: NXP Semiconductors

Philips Semiconductors
1999 Feb 23
Buffer Base Register Ch.1 Tx
Buffer Bound Register Ch.1 Tx
Address Pointer Reg Ch.1 Tx
Byte Count Register Ch.1 Tx
Data FIFO Register Ch.1 Lo Tx
Data FIFO Register Ch.1 Hi Tx
DMA Control Register Ch.2 Tx
FIFO Control & Status Register Ch.2 Tx
Segment Register Ch.2 Tx
Buffer Base Register Ch.2 Tx
Buffer Bound Register Ch.2 Tx
Address Pointer Reg Ch.2 Tx
Byte Count Register Ch.2 Tx
Data FIFO Register Ch.2 Lo Tx
Data FIFO Register Ch.2 Hi Tx
DMA Control Register Ch.3 Tx
FIFO Control & Status Register Ch.3 Tx
Segment Register Ch. 3 Tx
Buffer Base Register Ch. 3 Tx
Buffer Bound Register Ch.3 Tx
Address Pointer Reg Ch.3 Tx
Byte Count Register Ch.3 Tx
Data FIFO Register Ch.3Lo Tx
Data FIFO Register Ch.3 Hi Tx
Rx Character Time Out Register Ch.0
Rx Character Time Out Register Ch.1
Rx Character Time Out Register Ch.2
Rx Character Time Out Register Ch.3
Global DMA Interrupt Register
VACS
VACFG
VATCL
VATCH
VAEC
VBCS
VBCFG
VBTCL
VBTCH
VBEC
CMOS 16-bit communications microcontroller
MMR Name
Read/Write or
Read Only
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Miscellaneous DMA Registers
V.54/2047 Registers
Size
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
180–1FEh
Address
15
Offset
15Ah
15Ch
15Eh
16Ah
16Ch
16Eh
17Ah
17Ch
17Eh
24Ah
24Bh
24Ch
154h
156h
158h
160h
161h
162h
164h
166h
168h
170h
171h
172h
174h
176h
178h
200h
202h
204h
206h
210h
240h
241h
242h
243h
244h
248h
249h
Wrap Reload Value for A15–A8, A7–A0 reloaded
to zero by hardware
Upper Bound (plus 1) on A15–A0
Current Address pointer A15–A0
Corresponds to A15–A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
Byte0 & 1
Byte2 & 3
Control Register
Control & Status Register
Points to 64K data segment
Wrap Reload Value for A15 –A8, A7–A0 reloaded
to zero by hardware
Upper Bound (plus 1) on A15–A0
Current Address pointer A15–A0
Corresponds to A15–A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
Byte0 & 1
Byte2 & 3
Control Register
Control & Status Register
Points to 64K data segment
Wrap Reload Value for A15 –A8
Upper Bound (plus 1) on A15–A0
Current Address pointer A15–A0
Corresponds to A15–A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
Byte0 & 1
Byte2 & 3
RESERVED for future DMA
0 value disables counter interrupt.
Same as above, for Rx1
Same as above, for Rx2
Same as above, for Rx3
DMA Interrupt Flags
V.54 2047 Unit A Control & Status
V.54 2047 Unit A Configuration
V.54 2047 Unit A Threshold Cntr Lo
V.54 2047 Unit A Threshold Cntr Hi
V.54 2047 Unit A Error Counter
V.54 2047 Unit B Control & Status
V.54 2047 Unit B Configuration
V.54 2047 Unit B Threshold Cntr Lo
V.54 2047 Unit B Threshold Cntr Hi
V.54 2047 Unit B Error Counter
A7–A0 reloaded to zero by hardware
Description
Preliminary specification
XA-SCC
Reset
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
Value
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
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