IDT72V2113 Integrated Device Technology, IDT72V2113 Datasheet - Page 30

• Manufacturer Part Number: IDT72V2113
• Description: 256k X 18 / 512k X 9 Supersync Ii Fifo, 3.3v
• Manufacturer: Integrated Device Technology

NOTES:
1. Retransmit setup is complete after OR returns LOW.
2. No more than D - 2 words may be written to the FIFO between Reset (Master or Partial) and Retransmit setup. Therefore, IR will be LOW throughout the Retransmit setup procedure.
3. OE = LOW
4. W
5. There must be at least two words written to the FIFO before a Retransmit operation can be invoked.
6. RM is set HIGH during MRS.
IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II
IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC II
8K x 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9
131,072 x 18/262,144 x 9, 262,144 x 18/524,288 x 9
Q
WCLK
RCLK
0
WEN
1
REN
- Q
PAE
, W
PAF
OR
HF
RT
If x18 Input or x18 Output bus Width is selected, D = 131,073 for the IDT72V2103 and 262,145 for the IDT72V2113.
If both x9 Input and x9 Output bus Widths are selected, D = 262,145 for the IDT72V2103 and 524,289 for the IDT72V2113.
2
n
, W
3
t
ENS
= first, second and third words written to the FIFO after Master Reset.
W
x
t
ENH
t
ENS
t
RTS
t
RTS
W
x+1
t
t
t
REF
HF
ENH
t
SKEW2
Figure 12. Retransmit Timing (FWFT Mode)
1
TM
NARROW BUS FIFO
2
t
PAFS
1
t
A
TM
NARROW BUS FIFO
t
REF
30
t
ENS
W
1
(4)
2
t
A
t
PAES
W
2
(4)
3
t
A
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
W
3
(4)
APRIL 6, 2006
t
4
A
6119 drw15
t
ENH
W
4