IDT72V2113 Integrated Device Technology, IDT72V2113 Datasheet - Page 18

• Manufacturer Part Number: IDT72V2113
• Description: 256k X 18 / 512k X 9 Supersync Ii Fifo, 3.3v
• Manufacturer: Integrated Device Technology

RETRANSMIT OPERATION
accessed again. There are 2 modes of Retransmit operation, normal latency
and zero latency. There are two stages to Retransmit: first, a setup procedure
that resets the read pointer to the first location of memory, then the actual
retransmit, which consists of reading out the memory contents, starting at the
beginning of memory.
REN and WEN must be HIGH before bringing RT LOW. When zero latency is
utilized, REN does not need to be HIGH before bringing RT LOW. At least two
words, but no more than D - 2 words should have been written into the FIFO,
and read from the FIFO, between Reset (Master or Partial) and the time of
Retransmit setup. If x18 Input or x18 Output bus Width is selected, D = 131,072
for the IDT72V2103 and 262,144 for the IDT72V2113. If both x9 Input and x9
Output bus Widths are selected, D = 262,144 for the IDT72V2103 and 524,288
for the IDT72V2113. In FWFT mode, if x18 Input or x18 Output bus Width is
selected, D = 131,073 for the IDT72V2103 and 262,145 for the IDT72V2113.
If both x9 Input and x9 Output bus Widths are selected, D = 262,145 for the
IDT72V2103 and 524,289 for the IDT72V2113.
Retransmit setup by setting EF LOW. The change in level will only be noticeable
if EF was HIGH before setup. During this period, the internal read pointer is
initialized to the first location of the RAM array.
may begin starting with the first location in memory. Since IDT Standard mode
IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II
IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC II
8K x 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9
131,072 x 18/262,144 x 9, 262,144 x 18/524,288 x 9
The Retransmit operation allows data that has already been read to be
Retransmit setup is initiated by holding RT LOW during a rising RCLK edge.
If IDT Standard mode is selected, the FIFO will mark the beginning of the
When EF goes HIGH, Retransmit setup is complete and read operations
TM
NARROW BUS FIFO
TM
NARROW BUS FIFO
18
is selected, every word read including the first word following Retransmit setup
requires a LOW on REN to enable the rising edge of RCLK. See Figure 11,
Retransmit Timing (IDT Standard Mode), for the relevant timing diagram.
setup by setting OR HIGH. During this period, the internal read pointer is set
to the first location of the RAM array.
contents of the first location appear on the outputs. Since FWFT mode is selected,
the first word appears on the outputs, no LOW on REN is necessary. Reading
all subsequent words requires a LOW on REN to enable the rising edge of
RCLK. See Figure 12, Retransmit Timing (FWFT Mode), for the relevant timing
diagram.
PAF flags begin with the rising edge of RCLK that the RT is setup on. PAE is
synchronized to RCLK, thus on the second rising edge of RCLK after RT is setup,
the PAE flag will be updated. HF is asynchronous, thus the rising edge of RCLK
that RT is setup will update HF. PAF is synchronized to WCLK, thus the second
rising edge of WCLK that occurs t
is setup will update PAF. RT is synchronized to RCLK.
latency" or "zero latency". Figure 11 and Figure 12 mentioned previously,
relate to "normal latency". Figure 13 and Figure 14 show "zero latency"
retransmit operation. Zero latency basically means that the first data word to be
retransmitted, is placed onto the output register with respect to the RCLK pulse
that initiated the retransmit.
For either IDT Standard mode or FWFT mode, updating of the PAE, HF and
The Retransmit function has the option of 2 modes of operation, either "normal
If FWFT mode is selected, the FIFO will mark the beginning of the Retransmit
When OR goes LOW, Retransmit setup is complete; at the same time, the
SKEW
after the rising edge of RCLK that RT
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
APRIL 6, 2006