STE10-100A STMicroelectronics, STE10-100A Datasheet - Page 75
STE10-100A
Manufacturer Part Number
STE10-100A
Description
Pci 10/100 Ethernet Controller With Integrated Phy
Manufacturer
STMicroelectronics
Datasheet
1.STE10-100A.pdf
(82 pages)
- Current page: 75 of 82
- Download datasheet (795Kb)
STE10/100A
Figure 17. PCI timings
Table 23.
Symbol
Tfwpw
Tfwph
Tfcyc
Tfasc
Tfahc
Tfdh
Tfce
Tfce
Tfoe
Tfas
Tfah
Tfch
Tfds
Tfcs
Tfdf
Read/write cycle time
Address to read data setup
time
CS# to read data setup time
OE# active to read data
setup time
OE# inactive to data driven
delay time
Address setup time before
WE#
Address hold time after WE#
CS# setup time before WE#
Address hold time after WE#
Data setup time
Data hold time
Write pulse width
Write pulse width high
Address setup time before
CS#
Address hold time after CS#
Flash interface timings
INPUT
Parameter
0.4Vcc
OUTPUT delay
Tri-state OUTPUT
CLK
Ton
0.4Vcc
Tsu
Test condition
Th
0.4Vcc
Toff
Tval
0.4Vcc
Electrical specifications and timings
.
0.4Vcc
0.6Vcc
0.2Vcc
Min.
0.6Vcc
0.2Vcc
Typ.
Max.
Units
75/82
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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