A43L0616AV-7F AMIC Technology, Corp., A43L0616AV-7F Datasheet - Page 31
A43L0616AV-7F
Manufacturer Part Number
A43L0616AV-7F
Description
512K x 16 Bit x 2 Banks Synchronous DRAM
Manufacturer
AMIC Technology, Corp.
Datasheet
1.A43L0616AV-7F.pdf
(45 pages)
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CLOCK
A10/AP
ADDR
(May, 2003, Version 2.1)
Read & Write Cycle with Auto Precharge I @Burst Length=4
RAS
CAS
(CL=2)
(CL=3)
CKE
DQM
CS
DQ
DQ
BA
WE
0
Row Active
(A-Bank)
*Note : tRCD should be controlled to meet minimum tRAS before internal precharge start.
RAa
RAa
1
(In the case of Burst Length=1 & 2, BRSW mode)
2
3
Row Active
(B-Bank)
RBb
RBb
4
Auto Precharge
Read with
(A-Bank)
CAa
5
6
QAa0
7
QAa1
QAa0
Auto Precharge
8
Start Point
(A-Bank)
QAa2
QAa1
9
High
QAa2
30
QAa3
10
QAa3
11
Auto Precharge
12
Write with
(B-Bank)
DBb0
DBb0
CBb
13
DBb1
DBb1
14
AMIC Technology, Corp.
DBb2
DBb2
15
DBb3
DBb3
16
Auto Precharge
17
A43L0616A
Start Point
(B-Bank)
: Don't care
18
19
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