MEA-208 Zarlink Semiconductor, Inc., MEA-208 Datasheet - Page 13

• Manufacturer Part Number: MEA-208
• Description: 6+2 Ports Ethernet Access Controller
• Manufacturer: Zarlink Semiconductor, Inc.

XpressFlow-2020 Series –
Ethernet Switch Chipset
2.2.5 Register Map
© 1998 Vertex Networks, Inc.
1999
Note:
Register
Device Configuration Registers (DCR)
Interrupt Controls
Buffer Memory Interface
FCB Buffer & Stack Management
GCR
DCR0
DCR1
DCR2
DCR3
DCR4
DTSR
ISR
ISRM
IMSK
IAR
MWAR
MRAR
MBAR
MWBS
MRBS
MWDR
MWDX
MRDR
MRDX
FCBBA
FCBAG
FCBSL
FCBST
FCBSS
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All 32-bit registers are D-word aligned.
All 16-bit registers are also D-word aligned and right justified.
This is a Global Register. CPU is allowed to write the Global Register of all devices by a single operation.
These registers are reserved for system diagnostic usage only.
P
Description
Global Control Register
Device Status Register
Signature & Revision Register
ID Register
Device Configuration Register
Interfaces Status Register
Test Register
Interrupt Status Register – Unmasked
Interrupt Status Register – Masked
Interrupt Mask Register
Interrupt Acknowledgment Register
Memory Write Address Reg. – Single Cycle
Memory Read Address Reg. – Single Cycle
Memory Address Register – Burst Mode
Memory Write Burst Size (in D-words)
Memory Read Burst Size (in D-words)
Memory Write Data Register
Memory Write Data Reg. – Byte Swapping
Memory Read Data Register
Memory Read Data Reg. – Byte Swapping
Frame Control Buffer – Base Address
Frame Control Buffer – Buffer Aging Status
Frame Ctrl Buffer Stack – Size Limit
Frame Ctrl Buffer Stack – Buffer Low Threshold
Frame Ctrl Buffer Stack – Allocation Status
For the Little Endian CPUs, register offset bit [1,0] are always set to be 00.
For the Big Endian CPUs, register offset bit [1,0] are always set to be 10.
R
E
L
I
M
I
N
A
R
Y
6+2
I
13
N
Ports 10Mb Ethernet Access Controller
F
O
Endian
R
hFA0
hFB0
hE6C
hE6C
hD00
hD30
hD90
hDA0
hDB0
hF00
hF00
hF10
hF20
hF30
hF40
hF70
hF80
hF90
hE08
hE18
hE28
hE40
hE50
hE68
hE68
Little
I/O Offset
M
A
Endian
hE6C
hE6C
hDA2
hDB2
hFA2
hFB2
hE08
hE18
hE28
hE42
hE52
hE68
hE68
hD02
hD32
hD92
hF02
hF02
hF12
hF22
hF32
hF42
hF72
hF82
hF92
Big
T
I
16-bit
16-bit
16-bit
16-bit
16-bit
16-bit
16-bit
16-bit
16-bit
16-bit
16-bit
32-bit
32-bit
32-bit
16-bit
16-bit
32-bit
32-bit
32-bit
32-bit
16-bit
16-bit
16-bit
16-bit
16-bit
O
Size
Reg.
N
Rev. 2.1- February,
W/R
W/--
W/R
W/R
W/R
W/R
W/--
W/R
W/R
W/R
W/R
W/R
W/--
W/--
W/R
W/R
W/R
--/R
--/R
--/R
--/R
--/R
--/R
--/R
--/R
--/R
EA218
Note:
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