74AUP2G125DC,125 NXP Semiconductors, 74AUP2G125DC,125 Datasheet - Page 15

IC BUFF DVR 3-ST DL L PWR 8VSSOP

74AUP2G125DC,125

Manufacturer Part Number
74AUP2G125DC,125
Description
IC BUFF DVR 3-ST DL L PWR 8VSSOP
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP2G125DC,125

Package / Case
US8, 8-VSSOP
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
1
Current - Output High, Low
4mA, 4mA
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
AUP
Number Of Channels Per Chip
2
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 4 mA
Input Bias Current (max)
0.5 uA
Low Level Output Current
4 mA
Minimum Operating Temperature
- 40 C
Output Type
3-State
Propagation Delay Time
19 ns @ 1.1 V to 1.3 V or 10.8 ns @ 1.4 V to 1.6 V or 8.4 ns @ 1.65 V to 1.95 V or 6.3 ns @ 2.3 V to 2.7 V or 5.8 ns @ 3 V to 3.6 V
Number Of Lines (input / Output)
2 / 2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AUP2G125DC-G
74AUP2G125DC-G
935280727125
NXP Semiconductors
Fig 12. Package outline SOT833-1 (XSON8)
74AUP2G125
Product data sheet
XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm
DIMENSIONS (mm are the original dimensions)
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
UNIT
mm
SOT833-1
VERSION
OUTLINE
max
A
terminal 1
index area
0.5
e
(1)
(2)
max
0.04
L
A
1
1
0.25
0.17
b
IEC
- - -
1
8
2.0
1.9
D
e
1
1.05
0.95
E
0
2
7
MO-252
JEDEC
0.6
All information provided in this document is subject to legal disclaimers.
e
e
D
REFERENCES
1
0.5
e
Rev. 7 — 21 September 2010
1
3
6
0.35
0.27
L
JEITA
e
- - -
1
0.40
0.32
scale
L
1
1
b
4
5
A
L
1
E
Low-power dual buffer/line driver; 3-state
A
(2)
2 mm
PROJECTION
EUROPEAN
74AUP2G125
© NXP B.V. 2010. All rights reserved.
ISSUE DATE
07-11-14
07-12-07
SOT833-1
15 of 24

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