74AUP2G125 NXP Semiconductors, 74AUP2G125 Datasheet

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74AUP2G125

Manufacturer Part Number
74AUP2G125
Description
Low-power dual buffer/line driver
Manufacturer
NXP Semiconductors
Datasheet
www.DataSheet4U.com
1. General description
2. Features
The 74AUP2G125 provides the dual non-inverting buffer/line driver with 3-state output.
The 3-state output is controlled by the output enable input (nOE). A HIGH level at pin nOE
causes the output to assume a high-impedance OFF-state. This device has the
input-disable feature, which allows floating input signals. The inputs are disabled when the
output enable input nOE) is HIGH.
Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
static and dynamic power consumption across the entire V
This device is fully specified for partial Power-down applications using I
The I
the device when it is powered down.
74AUP2G125
Low-power dual buffer/line driver; 3-state
Rev. 02 — 19 April 2007
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
ESD protection:
Low static power consumption; I
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
Input-disable feature allows floating input conditions
I
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
OFF
OFF
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
HBM JESD22-A114-D Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101-C exceeds 1000 V
circuitry provides partial Power-down mode operation
circuitry disables the output, preventing the damaging backflow current through
CC
range from 0.8 V to 3.6 V. This device ensures a very low
CC
= 0.9 A (maximum)
CC
CC
range from 0.8 V to 3.6 V.
Product data sheet
OFF
.

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74AUP2G125 Summary of contents

Page 1

... Low-power dual buffer/line driver; 3-state Rev. 02 — 19 April 2007 1. General description The 74AUP2G125 provides the dual non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (nOE). A HIGH level at pin nOE causes the output to assume a high-impedance OFF-state. This device has the input-disable feature, which allows fl ...

Page 2

... Type number Package Temperature range Name 74AUP2G125DC +125 C 74AUP2G125GT +125 C 74AUP2G125GM +125 C 4. Marking Table 2. Marking Type number 74AUP2G125DC 74AUP2G125GT 74AUP2G125GM 5. Functional diagram 1OE 2OE Fig 1. Logic symbol 74AUP2G125_2 Product data sheet Description VSSOP8 plastic very thin shrink small outline package; 8 leads; ...

Page 3

... LOW) 8 supply voltage Rev. 02 — 19 April 2007 74AUP2G125 Low-power dual buffer/line driver; 3-state 2OE 74AUP2G125 terminal 1 index area 2OE 001aae975 Transparent top view © NXP B.V. 2007. All rights reserved. ...

Page 4

... Active mode and Power-down mode +125 C amb derates linearly with 8.0 mW/K. tot derates linearly with 2.4 mW/K. tot Conditions Active mode Power-down mode 0 3 Rev. 02 — 19 April 2007 74AUP2G125 Output Min Max Unit 0.5 +4 [1] 0.5 +4 ...

Page 5

... GND 0 3 Rev. 02 — 19 April 2007 74AUP2G125 Min Typ Max Unit ...

Page 6

... GND Rev. 02 — 19 April 2007 74AUP2G125 Low-power dual buffer/line driver; 3-state Min Typ Max [ [ 110 [ 0 1 1.3 - ...

Page 7

... GND Rev. 02 — 19 April 2007 74AUP2G125 Low-power dual buffer/line driver; 3-state Min Typ Max - - 0 0 120 [ 0. 0.70 ...

Page 8

... [4] nOE to nY; see Figure Rev. 02 — 19 April 2007 74AUP2G125 Low-power dual buffer/line driver; 3-state Min Typ - - - - [ [ [ +125 C [1] ...

Page 9

... CC [3] nOE to nY; see Figure Rev. 02 — 19 April 2007 74AUP2G125 Low-power dual buffer/line driver; 3-state +125 C [1] Min Typ Max Min Max ( 24 3.2 6.4 12.3 3.0 13.8 2.1 4 ...

Page 10

... CC [4] nOE to nY; see Figure Rev. 02 — 19 April 2007 74AUP2G125 Low-power dual buffer/line driver; 3-state +125 C [1] Min Typ Max Min Max ( 60 4.3 6.5 9.2 3.7 10.3 3.0 5 ...

Page 11

... V nY output Table 9. are typical output voltage drop that occur with the output load. Input 0 Rev. 02 — 19 April 2007 74AUP2G125 Low-power dual buffer/line driver; 3-state +125 C [1] Min Typ Max Min Max ( 2 ...

Page 12

... Output Rev. 02 — 19 April 2007 74AUP2G125 Low-power dual buffer/line driver; 3-state t PZL PZH V M outputs outputs enabled disabled mna362 0 ...

Page 13

... DUT GENERATOR R T 11. Load 500 50 pF 500 50 pF 500 50 pF 500 Rev. 02 — 19 April 2007 74AUP2G125 Low-power dual buffer/line driver; 3-state V EXT mna616 of the pulse generator EXT PLH PHL ...

Page 14

... A pin 1 index 2.5 scale (1) ( 0.27 0.23 2.1 2.4 0.12 0.5 0.17 0.08 1.9 2.2 REFERENCES JEDEC JEITA MO-187 Rev. 02 — 19 April 2007 74AUP2G125 Low-power dual buffer/line driver; 3-state detail 3.2 0.40 0.21 0.4 0.2 0.13 0.1 3.0 0.15 0.19 EUROPEAN ...

Page 15

... scale 1.05 0.35 0.40 0.6 0.5 0.95 0.27 0.32 REFERENCES JEDEC JEITA - - - MO-252 Rev. 02 — 19 April 2007 74AUP2G125 Low-power dual buffer/line driver; 3-state 4 ( EUROPEAN ISSUE DATE PROJECTION © NXP B.V. 2007. All rights reserved. SOT833-1 04-07-22 04-11- ...

Page 16

... 1.65 0.35 0.15 0.55 0.5 0.1 1.55 0.25 0.05 REFERENCES JEDEC JEITA MO-255 - - - Rev. 02 — 19 April 2007 74AUP2G125 Low-power dual buffer/line driver; 3-state detail 0.05 0.05 0.05 EUROPEAN PROJECTION © NXP B.V. 2007. All rights reserved. SOT902-1 ISSUE DATE 05-11-16 ...

Page 17

... Product data sheet Data sheet status Product data sheet ESD HBM values modified in Section 2 Product data sheet Rev. 02 — 19 April 2007 74AUP2G125 Low-power dual buffer/line driver; 3-state Change notice Supersedes - 74AUP2G125_1 - - © NXP B.V. 2007. All rights reserved ...

Page 18

... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 02 — 19 April 2007 74AUP2G125 Low-power dual buffer/line driver; 3-state © NXP B.V. 2007. All rights reserved ...

Page 19

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Document identifier: 74AUP2G125_2 All rights reserved. Date of release: 19 April 2007 ...

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