74AUP2G125DC,125 NXP Semiconductors, 74AUP2G125DC,125 Datasheet - Page 13

IC BUFF DVR 3-ST DL L PWR 8VSSOP

74AUP2G125DC,125

Manufacturer Part Number
74AUP2G125DC,125
Description
IC BUFF DVR 3-ST DL L PWR 8VSSOP
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP2G125DC,125

Package / Case
US8, 8-VSSOP
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
1
Current - Output High, Low
4mA, 4mA
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
AUP
Number Of Channels Per Chip
2
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 4 mA
Input Bias Current (max)
0.5 uA
Low Level Output Current
4 mA
Minimum Operating Temperature
- 40 C
Output Type
3-State
Propagation Delay Time
19 ns @ 1.1 V to 1.3 V or 10.8 ns @ 1.4 V to 1.6 V or 8.4 ns @ 1.65 V to 1.95 V or 6.3 ns @ 2.3 V to 2.7 V or 5.8 ns @ 3 V to 3.6 V
Number Of Lines (input / Output)
2 / 2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AUP2G125DC-G
74AUP2G125DC-G
935280727125
NXP Semiconductors
Table 11.
[1]
74AUP2G125
Product data sheet
Supply voltage
V
0.8 V to 3.6 V
Fig 10. Test circuit for measuring switching times
CC
For measuring enable and disable times R
For measuring propagation delays, set-up and hold times, and pulse width, R
Test data is given in
Definitions for test circuit:
R
C
R
V
L
L
T
EXT
Test data
= Load resistance.
= Load capacitance including jig and probe capacitance.
= Termination resistance should be equal to the output impedance Z
= External voltage for measuring switching times.
Load
C
5 pF, 10 pF, 15 pF and 30 pF
L
Table
11.
L
All information provided in this document is subject to legal disclaimers.
G
= 5 kΩ.
Rev. 7 — 21 September 2010
V I
R T
DUT
V
CC
R
5 kΩ or 1 MΩ
L
[1]
V O
L
C L
o
= 1 MΩ.
001aac521
Low-power dual buffer/line driver; 3-state
of the pulse generator.
V
EXT
V
t
open
PLH
5 kΩ
R L
EXT
, t
PHL
74AUP2G125
t
GND
PZH
, t
PHZ
© NXP B.V. 2010. All rights reserved.
t
2 × V
PZL
, t
CC
PLZ
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