FAN5401 Fairchild Semiconductor, FAN5401 Datasheet - Page 28

• Manufacturer Part Number: FAN5401
• Description: The FAN5401 combines a highly integrated switched-mode charger, to minimize single-cell Lithium-ion (Li-ion) charging time from a USB power source, and a boost regulator to power a USB peripheral from the battery
• Manufacturer: Fairchild Semiconductor

BST State
This is the normal operating mode of the regulator. The
regulator uses a minimum t
scheme. The minimum t
keeps the regulator’s switching frequency reasonably
constant in CCM. t
higher value if the inductor current reached 0 before t
in the prior cycle.
To ensure the VBUS does not pump significantly above the
regulation point, the boost switch remains off as long as
FB > V
Boost Faults
If a BOOST fault occurs:
Restart After Boost Faults
If boost was enabled with the OPA_MODE bit and
OTG_EN=0, Boost Mode can only be enabled through
subsequent I
boost faults. If OTG_EN=1 and the OTG pin is still ACTIVE
(see Table 16), the boost restarts after a 5.2ms delay, as
shown in Figure 44. If the fault condition persists, restart is
attempted every 5ms until the fault clears or an I
command disables the boost.
Table 18. Fault Bits During Boost Mode
B2 B1 B0
Figure 44. Boost Response Attempting to Start into V
© 2009 Fairchild Semiconductor Corporation
FAN5400 Family • Rev. 1.0.7
CURRENT
1.
2.
3.
4.
ENABLED
BATTERY
0
0
0
0
1
1
1
1
Fault Bit
BOOST
VBUS
The STAT pin pulses.
OPA_MODE bit is reset.
The power stage is in High-Impedance Mode.
The FAULT bits (REG0[2:0]) are set per Table 18.
0
0
1
1
0
0
1
1
REF
.
0
1
0
1
0
1
0
1
0
0
450mA
2
Normal (no fault)
V
V
advance to the next state during soft-start
or sustained (>50s) current limit during the
BST state.
V
N/A: This code does not appear.
Thermal shutdown
Timer fault; all registers reset.
N/A: This code does not appear.
C commands since OPA_MODE is reset on
BUS
BUS
BAT
Short Circuit (Times in s)
< UVLO
> VBUS
fails to achieve the voltage required to
ON(MIN)
64
OFF
BST
is proportional to V
Fault Description
OVP
560
is proportional to
OFF
-minimum t
5200
ON
BAT
V
V
OUT
modulation
IN
and is a
, which
OFF(MIN)
BUS
2
C
28
VREG Pin
The VREG pin on FAN5400 - FAN5402 provides a voltage
protected from over-voltage surges on VBUS, which can be
used to run auxiliary circuits. This voltage is essentially a
current-limited replica of PMID. The maximum voltage on
this node is 5.9V.
FAN5403-FAN5405 provide a 1.8V regulated output on this
pin, which can be disabled through I
DIS_VREG bit (REG5[6]). VREG can supply up to 2mA. This
circuit, which is powered from PMID, is enabled only when
PMID > V
During boost, V
bit (REG1[1])=1.
Monitor Register (Reg10H)
Additional status monitoring bits enable the host processor
to have more visibility into the status of the IC. The monitor
bits are real-time status indicators and are not internally
debounced or otherwise time qualified.
The state of the MONITOR register bits listed in High-
Impedance Mode are only valid when V
BAT
and does not drain current from the battery.
REG
is off. It is also off when the HZ_MODE
BUS
2
C by setting the
www.fairchildsemi.com
is valid.