FAN7602C Fairchild Semiconductor, FAN7602C Datasheet - Page 11

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FAN7602C

Manufacturer Part Number
FAN7602C
Description
The FAN7602C is a green current-mode PWM controller
Manufacturer
Fairchild Semiconductor
Datasheet

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© 2009 Fairchild Semiconductor Corporation
FAN7602C • Rev. 1.0.0
To limit the output power of the converter constantly, the
power limit function is included in FAN7602C. Sensing
the converter input voltage through the Latch/Plimit pin,
the Plimit offset voltage is subtracted from 1V. As shown
in Figure 22, the Plimit offset voltage is subtracted from
1V and the switch on-time decreases as the Plimit offset
voltage increases. If the converter input voltage
increases, the switch on-time decreases, keeping the
output power constant. The offset voltage is proportional
to the Latch/Plimit pin voltage and the gain is 0.16. If the
Latch/Plimit voltage is 1V, the offset voltage is 0.16V.
4. Burst Mode Block
The FAN7602C contains the burst-mode block to reduce
the power loss at a light load and no load. A hysteresis
comparator senses the offset voltage of the Burst+ for
the burst mode, as shown in Figure 23. The Burst+ is
the sum of the CS/FB voltage and Plimit offset voltage.
The FAN7602C enters the burst mode when the offset
voltage of the Burst+ is higher than 0.95V and exits the
burst mode when the offset voltage is lower than 0.88V.
The offset voltage is sensed during the switch off time.
5. Protection Block
The FAN7602C contains several protection functions to
improve system reliability.
PWM+
CS/FB
PWM+
CS/FB
GND
GND
1V
1V
Figure 22. CS/FB Pin Voltage Waveforms
Figure 23. Burst Mode Block
(a) Low Power Limit Offset Case
(b) High Power Limit Offset Case
+
On Time
On Time
Power Limit
Offset
Power Limit
FB
Offset
Offset
FB
Offset
11
5.1 Overload Protection (OLP)
The FAN7602C contains the overload protection
function. If the output load is higher than the rated
output current, the output voltage drops and the
feedback error amplifier is saturated. The offset of the
CS/FB voltage representing the feedback information is
almost zero. As shown in Figure 24, the CS/FB voltage
is compared with 50mV reference when the internal
clock signal is HIGH and, if the voltage is lower than
50mV, the OLP timer starts counting. If the OLP
condition persists for 22ms, the timer generates the OLP
signal. The protection is reset by the UVLO. The OLP
block is enabled after the soft-start finishes.
5.2 Line Under-Voltage Protection
If the input voltage of the converter is lower than the
minimum operating voltage, the converter input current
increases too much, causing components failure.
Therefore, if the input voltage is LOW, the converter
should be protected. The LUVP circuit senses the input
voltage using the LUVP pin and, if this voltage is lower
than 2V, the LUVP signal is generated. The comparator
has 0.5V hysteresis. If the LUVP signal is generated, the
output drive block is shut down, the output voltage
feedback loop is saturated, and the OLP works if the
LUVP condition persists more than 22ms.
5.3 Latch Protection
The latch protection is provided to protect the system
against abnormal conditions using the Latch/Plimit pin.
The Latch/Plimit pin can be used for the output over-
voltage protection and/or other protections. If the Latch/
Plimit pin voltage is made higher than 4V by an external
circuit, the IC is shut down. The latch protection is reset
when the V
5.4 Over-Voltage Protection (OVP)
If the V
the OVP protection is reset when the V
lower than 5V.
6. Output Drive Block
The FAN7602C contains a single totem-pole output
stage to drive a power MOSFET. The drive output is
capable of up to 450mA sourcing current and 600mA
sinking current with typical rise and fall time of 45ns and
35ns, respectively, with a 1nF load.
CC
Figure 24. Overload Protection Circuit
voltage reaches 19V, the IC shuts down and
CC
Figure 25. Line UVP Circuit
voltage is lower than 5V.
+
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CC
voltage is

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