TMPM380FWDFG Toshiba, TMPM380FWDFG Datasheet - Page 445

• Manufacturer Part Number: TMPM380FWDFG
• Manufacturer: Toshiba

Specifications of TMPM380FWDFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 12K
• Number Of Pins: 100
• Package: QFP(14×20)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 2
• I2c/sio (ch): 2
• Uart/sio (ch): 5
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 18
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

15 Serial Bus Interface (I2C/SIO)
15.5.6 Configuring the SBI as a Transmitter or a Receiver
Setting SBInCR2 <TRX> to “1” configures the SBI as a transmitter. Setting <TRX> to “0”
configures the SBI as a receiver.
At the slave mode, the SBI receives the direction bit (
following occasions:
If the value of the direction bit (
“0,” <TRX> is set to “0”.
As a master device, the SBI receives acknowledgement from a slave device. If the direction
bit of “1” is transmitted, <TRX> is set to “0” by the hardware. If the direction bit is “0,” <TRX>
changes to “1.” If the SBI does not receive acknowledgement, <TRX> retains the previous
value.
<TRX> is cleared to “0” by the hardware when it detects the stop condition on the bus or the
arbitration lost.
•
•
•
when data is transmitted in the addressing format
when the received slave address matches the value specified at I2CCR
when a general-call address is received; i.e., the eight bits following the start
condition are all zeros
TMPM380/M382 - 16 / 41 -
R/
W
) is “1,” <TRX> is set to “1” by the hardware. If the bit is
R/
W
) from the master device on the
TMPM380/M382