TMPM380FWDFG Toshiba, TMPM380FWDFG Datasheet - Page 189

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TMPM380FWDFG

Manufacturer Part Number
TMPM380FWDFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM380FWDFG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
12K
Number Of Pins
100
Package
QFP(14×20)
Vcc
5V
Cpu Mhz
40
Ssp (ch) Spi
2
I2c/sio (ch)
2
Uart/sio (ch)
5
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
18
16-bit Timer / Counter
8
Motor / Igbt Control
Y
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
9.5.2
UC0 is a 16-bit binary counter.
Up-counter (UC0)
types φT1, φT4 and φT16 of prescaler output clock or the external clock of the TB0IN pin.
“1”, and stops counting and clears counter value if <TBRUN> = “0”.
UC0 source clock, specified by
Counter operation is specified by TB0RUN<TBRUN>. UC0 starts counting if <TBRUN> =
1) When a compare match is detected
2) When UC0 stops
UC0 stops counting and clears counter value if TB0RUN <TBRUN> = “0”.
If UC0 overflow occurs, the INTTB00 overflow interrupt is generated.
By setting TB0MOD<TBCLE> = “1”, UC0 is cleared in case the comparator detects a
match between counter value and the value set in TB0RG1. UC0 operates as a
free-running counter if TB0MOD<TBCLE> = “0”.
Source clock
Count start/ stop
Timing to clear UC0
UC0 overflow
TMPM380/M382 - 23 / 34 -
TB0MOD<TB0CLK1:0>
, can be selected from either three
TMPM380/M382

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