TMPM380FWDFG Toshiba, TMPM380FWDFG Datasheet - Page 104

• Manufacturer Part Number: TMPM380FWDFG
• Manufacturer: Toshiba

Specifications of TMPM380FWDFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 12K
• Number Of Pins: 100
• Package: QFP(14×20)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 2
• I2c/sio (ch): 2
• Uart/sio (ch): 5
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 18
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

7.6.2.20
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
System Handler Control and State Register
SVCall
0: Inactive
1: Active
0: Not
pended
SVCall
1: Pended
PENDED
SVCALL
SVCALL
ACT
R/W
R/W
15
23
31
7
0
0
0: Not
pended
Bus Fault
1: Pended
PENDED
BUSFAU
R/W
14
22
30
LT
6
0
TMPM380/M382 - 49 / 59 -
Memory
Management
0: Not
pended
1: Pended
“0” is read.
“0” is read.
MEMFAU
PENDED
R/W
13
21
29
LT
5
R
R
0
0
0
0: Not
pended
Usage
Fault
1: Pended
USGFAU
PENDED
R/W
12
20
28
LT
4
0
“0” is read.
R
0
Usage fault
0: Inactive
1: Active
SysTick
0: Inactive
1: Active
SYSTICK
USGFAU
ACT
R/W
ACT
R/W
19
27
11
LT
3
0
0
“0” is read. Bus fault
0: Disable
PendSV
0: Inactive
1: Active
Usage
Fault
1: Enable
PENDSV
USGFAU
ACT
ENA
R/W
R/W
10
18
26
LT
2
R
0
0
0
0: Inactive
1: Active
“0” is read. Debug
Bus Fault
0: Disable
1: Enable
BUSFAU
BUSFAU
ACT
ENA
R/W
R/W
17
25
LT
LT
9
1
R
0
0
0
TMPM380/M382
Memory
Management
0: Inactive
1: Active
Memory
Management
Monitor
0: Inactive
1: Active
0: Disable
1: Enable
MEMFAU
MEMFAU
MONITO
ENA
ACT
R/W
ACT
R/W
R/W
16
24
LT
LT
0
8
R
0
0
0