74LCX16244MTDX Fairchild Semiconductor, 74LCX16244MTDX Datasheet - Page 6

IC BUFF DVR 16BIT LOW V 48TSSOP

74LCX16244MTDX

Manufacturer Part Number
74LCX16244MTDX
Description
IC BUFF DVR 16BIT LOW V 48TSSOP
Manufacturer
Fairchild Semiconductor
Series
74LCXr
Datasheet

Specifications of 74LCX16244MTDX

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
4
Number Of Bits Per Element
4
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Logic Family
74LCX
Number Of Channels Per Chip
Hexadecimal
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
85 C
Mounting Style
SMD/SMT
High Level Output Current
- 24 mA
Input Bias Current (max)
20 uA
Low Level Output Current
24 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
16
Output Type
3-State
Propagation Delay Time
5.2 ns @ 2.7 V or 4.5 ns @ 3.3 V
Logic Device Type
Buffer/Line Driver, Non Inverting
Supply Voltage Range
2V To 3.6V
Logic Case Style
TSSOP
No. Of Pins
48
Operating Temperature Range
-40°C To +85°C
Supply Voltage Min
2V
Rohs Compliant
Yes
Dc
01+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LCX16244MTDX
74LCX16244MTDXTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LCX16244MTDX
Quantity:
6 000
Company:
Part Number:
74LCX16244MTDX
Quantity:
292
www.fairchildsemi.com
AC LOADING and WAVEFORMS
Waveform for Inverting and Non-Inverting Functions
Propagation Delay. Pulse Width and t
3-STATE Output Low Enable and
Disable Times for Logic
FIGURE 1. AC Test Circuit (C
Symbol
V
V
V
V
mo
mi
x
y
(Input Characteristics; f =1MHz, t
rec
t
t
t
3.3V
PLH
V
PZL
PZH
V
Waveforms
OL
OH
Test
1.5V
1.5V
, t
, t
,t


PHZ
r
PHL
PLZ
FIGURE 2. Waveforms
0.3V
0.3V
0.3V
Generic for LCX Family
V
L
CC
includes probe and jig capacitance)
6V at V
x 2 at V
6
V
V
OL
OH
Setup Time, Hold Time and Recovery Time for Logic
CC
2.7V
1.5V
1.5V
Switch
V
Open
GND


CC
CC
0.3V
0.3V
3.3
R
2.5
= t
r
3-STATE Output High Enable and
0.3V
F
r
= 3ns)
0.2V
Disable Times for Logic
V
V
2.5V
OH
OL
V
V

t
CC
CC

rise
r
0.15V
0.15V
0.2V
/2
/2
and t
fall

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