ST72334J4 STMicroelectronics, ST72334J4 Datasheet - Page 48

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ST72334J4

Manufacturer Part Number
ST72334J4
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY,ADC, 16-BIT TIMERS, SPI, SCI INTERFACES
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72334J4

Clock Sources
crystal/ceramic resonator oscillators or RC oscillators, external clock, backup Clock Security System
4 Power Saving Modes
Halt, Active-Halt, Wait and Slow
Two 16-bit Timers With
2 input captures (only one on timer A), 2 output compares (only one on timer A), External clock input on timer A, PWM and Pulse generator modes
ST72334J/N, ST72314J/N, ST72124J
MISCELLANEOUS REGISTERS (Cont’d)
MISCELLANEOUS REGISTER 2 (MISCR2)
Read /Write
Reset Value: 0000 0000 (00h)
Bit 7:6 = Reserved Must always be cleared
Bit 5:4 = BC[1:0] Beep control
These 2 bits select the PF1 pin beep capability.
The beep output signal is available in ACTIVE-
HALT mode but has to be disabled to reduce the
consumption.
Bit 3:2 = Reserved Must always be cleared
Bit 1 = SSM SS mode selection
It is set and cleared by software.
0: Normal mode - SS uses information coming
from the SS pin of the SPI.
1: I/O mode, the SPI uses the information stored
into bit SSI.
Bit 0 = SSI SS internal mode
This bit replaces pin SS of the SPI when bit SSM is
set to 1. (see SPI description). It is set and cleared
by software.
Table 10. Miscellaneous Register Map and Reset Values
48/153
Address
7
-
(Hex.)
0020h
0040h
Beep mode with f
~500-Hz
~1-KHz
~2-KHz
-
MISCR1
Reset Value
MISCR2
Reset Value
BC1
Register
Label
Off
BC0
~50% duty cycle
OSC
Beep signal
=16MHz
Output
IS11
-
7
0
0
-
IS10
SSM
6
0
0
BC1 BC0
0
0
1
1
SSI
0
0
1
0
1
MCO
BC1
5
0
0
IS21
BC0
4
0
0
IS20
3
0
0
CP1
2
0
0
SSM
CP0
1
0
0
SMS
SSI
0
0
0

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