ST72334J4 STMicroelectronics, ST72334J4 Datasheet - Page 14

• Manufacturer Part Number: ST72334J4
• Description: 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY,ADC, 16-BIT TIMERS, SPI, SCI INTERFACES
• Manufacturer: STMicroelectronics

Specifications of ST72334J4

• Clock Sources: crystal/ceramic resonator oscillators or RC oscillators, external clock, backup Clock Security System
• 4 Power Saving Modes: Halt, Active-Halt, Wait and Slow
• Two 16-bit Timers With: 2 input captures (only one on timer A), 2 output compares (only one on timer A), External clock input on timer A, PWM and Pulse generator modes

ST72334J/N, ST72314J/N, ST72124J
REGISTER & MEMORY MAP (Cont’d)
Table 2. Hardware Register Map
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Address
000Ah
000Bh
000Ch
000Dh
000Eh
000Fh
001Fh
0000h
0001h
0002h
0003h
0004h
0005h
0006h
0007h
0008h
0009h
0010h
0011h
0012h
0013h
0014h
0015h
0016h
0017h
0020h
0021h
0022h
0023h
0024h
0028h
0029h
to
to
Port A
Port C
Port B
Port E
Port D
Block
Port F
MCC
SPI
PADR
PADDR
PAOR
PCDR
PCDDR
PCOR
PBDR
PBDDR
PBOR
PEDR
PEDDR
PEOR
PDDR
PDDDR
PDOR
PFDR
PFDDR
PFOR
MISCR1
SPIDR
SPICR
SPISR
MCCSR
Register
Label
Port A Data Register
Port A Data Direction Register
Port A Option Register
Port C Data Register
Port C Data Direction Register
Port C Option Register
Port B Data Register
Port B Data Direction Register
Port B Option Register
Port E Data Register
Port E Data Direction Register
Port E Option Register
Port D Data Register
Port D Data Direction Register
Port D Option Register
Port F Data Register
Port F Data Direction Register
Port F Option Register
Miscellaneous Register 1
SPI Data I/O Register
SPI Control Register
SPI Status Register
Main Clock Control / Status Register
Reserved Area (9 Bytes)
Reserved Area (5 Bytes)
Reserved Area (1 Byte)
Reserved Area (1 Byte)
Reserved Area (1 Byte)
Reserved Area (1 Byte)
Reserved Area (1 Byte)
Register Name
Status
Reset
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
xxh
0xh
00h
01h
1)
1)
1)
1)
1)
1)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Read Only
R/W
Remarks
2)
2)
2)
2)