ST72260G1 STMicroelectronics, ST72260G1 Datasheet - Page 154
ST72260G1
Manufacturer Part Number
ST72260G1
Description
8-BIT MCU WITH FLASH OR ROM MEMORY, ADC, TWO 16-BIT TIMERS, I2C, SPI, SCI INTERFACES
Manufacturer
STMicroelectronics
Datasheet
1.ST72262G2.pdf
(172 pages)
Specifications of ST72260G1
4 K Or 8 Kbytes Program Memory
ROM or single voltage extended Flash (XFlash) with read-out protection, write protection, In-Circuit Programming and In-Application Programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
4 Power Saving Modes
Halt, Active Halt,Wait and Slow
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input on one timer, PWM and Pulse generator modes
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ST72260Gx, ST72262Gx, ST72264Gx
COMMUNICATION INTERFACE CHARACTERISTICS (Cont’d)
Figure 94. SPI Slave Timing Diagram with CPHA=1
Figure 95. SPI Master Timing Diagram
Notes:
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave mode) has
its alternate function capability released. In this case, the pin status depends of the I/O port configuration.
154/172
MISO
MOSI
MISO
MOSI
SS
CPHA=0
CPOL=0
CPHA=0
CPOL=1
OUTPUT
INPUT
SS
INPUT
CPHA=0
CPOL=0
CPHA=0
CPOL=1
CPHA=1
CPOL=0
CPHA=1
CPOL=1
INPUT
OUTPUT
INPUT
see
note 2
see note 2
t
a(SO)
t
su(SS)
HZ
t
t
t
v(MO)
w(SCKH)
w(SCKL)
t
su(MI)
t
su(SI)
MSB OUT
MSB IN
MSB OUT
t
h(MO)
t
MSB IN
h(MI)
1)
t
h(SI)
t
c(SCK)
t
c(SCK)
t
t
t
v(SO)
w(SCKH)
w(SCKL)
DD
and 0.7xV
BIT6 OUT
1)
BIT6 OUT
BIT6 IN
DD
.
BIT1 IN
t
h(SO)
t
t
t
t
r(SCK)
f(SCK)
r(SCK)
f(SCK)
LSB OUT
LSB IN
LSB OUT
LSB IN
t
h(SS)
t
see note 2
dis(SO)
note 2
see
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