ST72321J7-Auto STMicroelectronics, ST72321J7-Auto Datasheet - Page 44
ST72321J7-Auto
Manufacturer Part Number
ST72321J7-Auto
Description
8-bit MCU for automotive with 48 Kbyte Flash, 10-bit ADC, timers, SPI, SCI and I2C interfaces
Manufacturer
STMicroelectronics
Datasheet
1.ST72321R9-AUTO.pdf
(243 pages)
Specifications of ST72321J7-Auto
Hdflash Endurance
100 cycles, data retention 20 years
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
4 Power Saving Modes
Halt, Active Halt, Wait and Slow
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Supply, reset and clock management
Figure 14. Low voltage detector versus reset
6.6.2
Caution:
44/243
RESET
V
V
IT+
IT-
Auxiliary voltage detector (AVD)
The auxiliary voltage detector function (AVD) is based on an analog comparison between a
V
voltage level (V
reference value for rising voltage in order to avoid parasitic detection (hysteresis).
The output of the AVD comparator can be read directly by the application software through a
real-time status bit (AVDF) in the SICSR register. This bit is read only.
The AVD function is active only if the LVD is enabled through the option byte.
Monitoring the V
This mode is selected by clearing the AVDS bit in the SICSR register.
The AVD voltage threshold value is relative to the selected LVD threshold configured by
option byte (see
If the AVD interrupt is enabled, an interrupt is generated when the voltage crosses the
V
In the case of a drop in voltage, the AVD interrupt acts as an early warning, allowing
software to shut down safely before the LVD resets the microcontroller. See
The interrupt on the rising edge is used to inform the application that the V
is over.
If the voltage rise time t
selected by option byte), no AVD interrupt will be generated when V
If t
●
●
V
DD
IT-(AVD)
IT+(AVD)
rv
is greater than 256 or 4096 cycles
two AVD interrupts will be received if the AVD interrupt is enabled before the V
threshold is reached: the first when the AVDIE bit is set, and the second when the
threshold is reached.
only one AVD interrupt will occur if the AVD interrupt is enabled after the V
threshold is reached.
and V
or V
IT-(AVD)
IT+(AVD)
EVD
Section 21.1.1: Flash configuration on page
). The V
DD
threshold (AVDF bit toggles).
reference value and the V
rv
main supply
is less than 256 or 4096 CPU cycles (depending on the reset delay
IT-
reference value for falling voltage is lower than the V
Doc ID 13829 Rev 1
V
hys
DD
main supply or the external EVD pin
223).
IT+(AVD)
ST72321xx-Auto
DD
is reached.
Figure
warning state
IT+(AVD)
IT+
15.
IT+(AVD)
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