ST72321J7-Auto STMicroelectronics, ST72321J7-Auto Datasheet - Page 164
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ST72321J7-Auto
Manufacturer Part Number
ST72321J7-Auto
Description
8-bit MCU for automotive with 48 Kbyte Flash, 10-bit ADC, timers, SPI, SCI and I2C interfaces
Manufacturer
STMicroelectronics
Datasheet
1.ST72321R9-AUTO.pdf
(243 pages)
Specifications of ST72321J7-Auto
Hdflash Endurance
100 cycles, data retention 20 years
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
4 Power Saving Modes
Halt, Active Halt, Wait and Slow
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I2C bus interface (I2C)
16.7
16.7.1
164/243
Register description
I
Table 83.
CR
2
Bit
7:6
C control register (CR)
5
4
3
2
7
START
ENGC
Name
Reserved
ACK
PE
-
-
CR register description
Reserved. Forced to 0 by hardware.
Peripheral enable
Enable General Call
Generation of a Start condition
Acknowledge enable
This bit is set and cleared by software.
0: Peripheral disabled
1: Master/Slave capability
Notes:
- When PE = 0, all the bits of the CR register and the SR register except the Stop
bit are reset. All outputs are released while PE = 0
- When PE = 1, the corresponding I/O pins are selected by hardware as alternate
functions.
To enable the I
write only activates the interface (only PE is set).
This bit is set and cleared by software. It is also cleared by hardware when the
interface is disabled (PE = 0). The 00h General Call address is acknowledged (01h
ignored).
0: General Call disabled
1: General Call enabled
Note: In accordance with the I2C standard, when GCAL addressing is enabled, an
I2C slave can only receive data. It will not transmit data to the master.
This bit is set and cleared by software. It is also cleared by hardware when the
interface is disabled (PE = 0) or when the Start condition is sent (with interrupt
generation if ITE = 1).
In Master mode
0: No start generation
1: Repeated start generation
In Slave mode
0: No start generation
1: Start generation when the bus is free
This bit is set and cleared by software. It is also cleared by hardware when the
interface is disabled (PE = 0).
0: No acknowledge returned
1: Acknowledge returned after an address byte or a data byte is received
6
RW
PE
5
2
Doc ID 13829 Rev 1
C interface, write the CR register TWICE with PE = 1 as the first
ENGC
RW
4
START
Function
RW
3
ACK
RW
2
Reset value: 0000 0000 (00h)
STOP
RW
1
ST72321xx-Auto
RW
ITE
0
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