ST72321J7-Auto STMicroelectronics, ST72321J7-Auto Datasheet - Page 157
ST72321J7-Auto
Manufacturer Part Number
ST72321J7-Auto
Description
8-bit MCU for automotive with 48 Kbyte Flash, 10-bit ADC, timers, SPI, SCI and I2C interfaces
Manufacturer
STMicroelectronics
Datasheet
1.ST72321R9-AUTO.pdf
(243 pages)
Specifications of ST72321J7-Auto
Hdflash Endurance
100 cycles, data retention 20 years
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
4 Power Saving Modes
Halt, Active Halt, Wait and Slow
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ST72321xx-Auto
16.3.3
SDA/SCL line control
Transmitter mode
The interface holds the clock line low before transmission to wait for the microcontroller to
write the byte in the data register.
Receiver mode
The interface holds the clock line low after reception to wait for the microcontroller to read
the byte in the data register.
The SCL frequency (f
the I
When the I
In this case, the value of the external pull-up resistor used depends on the application.
When the I
Figure 67. I
SCL or SCLI
SDA or SDAI
2
C bus mode.
2
2
C cell is enabled, the SDA and SCL ports must be configured as floating inputs.
C cell is disabled, the SDA and SCL ports revert to being standard I/O port pins.
2
C interface block diagram
CLOCK CONTROL
SCL
CLOCK CONTROL REGISTER (CCR)
DATA CONTROL
STATUS REGISTER 1 (SR1)
STATUS REGISTER 2 (SR2)
) is controlled by a programmable clock divider which depends on
CONTROL REGISTER (CR)
Doc ID 13829 Rev 1
OWN ADDRESS REGISTER 1 (OAR1)
OWN ADDRESS REGISTER 2 (OAR2)
DATA SHIFT REGISTER
DATA REGISTER (DR)
CONTROL LOGIC
COMPARATOR
INTERRUPT
I2C bus interface (I2C)
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