ST72321J7-Auto STMicroelectronics, ST72321J7-Auto Datasheet - Page 142
ST72321J7-Auto
Manufacturer Part Number
ST72321J7-Auto
Description
8-bit MCU for automotive with 48 Kbyte Flash, 10-bit ADC, timers, SPI, SCI and I2C interfaces
Manufacturer
STMicroelectronics
Datasheet
1.ST72321R9-AUTO.pdf
(243 pages)
Specifications of ST72321J7-Auto
Hdflash Endurance
100 cycles, data retention 20 years
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
4 Power Saving Modes
Halt, Active Halt, Wait and Slow
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Serial communications interface (SCI)
Figure 64. SCI baud rate and extended prescaler block diagram
142/243
f
CPU
/16
Framing error
A framing error is detected when:
●
●
When the framing error is detected:
●
●
●
The FE bit is reset by a SCISR register read operation followed by a SCIDR register read
operation.
The stop bit is not recognized on reception at the expected time, following either a de-
synchronization or excessive noise.
A break is received.
The FE bit is set by hardware.
Data is transferred from the Shift register to the SCIDR register.
No interrupt is generated. However this bit rises at the same time as the RDRF bit
which itself generates an interrupt.
/PR
EXTENDED TRANSMITTER PRESCALER REGISTER
EXTENDED RECEIVER PRESCALER REGISTER
EXTENDED PRESCALER TRANSMITTER RATE CONTROL
EXTENDED PRESCALER RECEIVER RATE CONTROL
SCP1
CONVENTIONAL BAUD RATE GENERATOR
SCP0 SCT2 SCT1 SCT0 SCR2 SCR1 SCR0
TRANSMITTER RATE
EXTENDED PRESCALER
CONTROL
Doc ID 13829 Rev 1
RECEIVER RATE
CONTROL
SCIERPR
SCIBRR
SCIETPR
ST72321xx-Auto
TRANSMITTER
RECEIVER
CLOCK
CLOCK
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