ST72521R9-Auto STMicroelectronics, ST72521R9-Auto Datasheet - Page 41

• Manufacturer Part Number: ST72521R9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72521R9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
• 4 Power Saving Modes: Halt, Active Halt, Wait and Slow

ST72521xx-Auto
6.3
Caution:
6.4
Caution:
Phase locked loop
If the clock frequency input to the PLL is in the range 2 to 4 MHz, the PLL can be used to
multiply the frequency by two to obtain an f
byte. If the PLL is disabled, then f
The PLL is not recommended for applications where timing accuracy is required (see
Section 20.5.5: PLL characteristics on page
Figure 10. PLL block diagram
Multi-oscillator (MO)
The main clock of the ST7 can be generated by three different source types coming from the
multi-oscillator block:
●
●
●
Each oscillator is optimized for a given frequency range in terms of consumption and is
selectable through the option byte. The associated hardware configurations are shown in
Table
The OSC1 and/or OSC2 pins must not be left unconnected. For the purposes of Failure
Mode and Effect Analysis, it should be noted that if the OSC1 and/or OSC2 pins are left
unconnected, the ST7 main oscillator may start and, in this configuration, could generate an
f
unsafe/undefined state. The product behavior must therefore be considered undefined when
the OSC pins are left unconnected.
External clock source
In this external clock mode, a clock signal (square, sinus or triangle) with ~50% duty cycle
has to drive the OSC1 pin while the OSC2 pin is tied to ground.
OSC
an external source
4 crystal or ceramic resonator oscillators
an internal high frequency RC oscillator
clock frequency in excess of the allowed maximum (> 16 MHz), putting the ST7 in an
10. Refer to
Section 20: Electrical characteristics
f
OSC
Doc ID 17660 Rev 1
OSC2
PLL x 2
= f
/ 2
OSC
OSC2
231).
/2.
of 4 to 8 MHz. The PLL is enabled by option
PLL OPTION BIT
Supply, reset and clock management
for more details.
0
1
f
OSC2
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