ST72521R9-Auto STMicroelectronics, ST72521R9-Auto Datasheet - Page 126

• Manufacturer Part Number: ST72521R9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72521R9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
• 4 Power Saving Modes: Halt, Active Halt, Wait and Slow

Serial peripheral interface (SPI)
Figure 56. Single master/single slave application
14.3.2
126/276
MSBit
GENERATOR
8-BIT SHIFT REGISTER
CLOCK
SPI
Slave select management
As an alternative to using the SS pin to control the Slave Select signal, the application can
choose to manage the Slave Select signal by software. This is configured by the SSM bit in
the SPICSR register (see
In software management, the external SS pin is free for other application uses and the
internal SS signal level is driven by writing to the SSI bit in the SPICSR register.
In Master mode
●
In Slave mode
There are two cases depending on the data/clock timing relationship (see
If CPHA = 1 (data latched on 2nd clock edge):
●
If CPHA = 0 (data latched on 1st clock edge):
●
MASTER
SS internal must be held high continuously
SS internal must be held low during the entire transmission. This implies that in single
slave applications the SS pin either can be tied to V
managing the SS function by software (SSM = 1 and SSI = 0 in the in the SPICSR
register)
SS internal must be held low during byte transmission and pulled high between each
byte to allow the slave to write to the shift register. If SS is not pulled high, a Write
Collision error will occur when the slave writes to the shift register (see
error (WCOL) on page
LSBit
Figure
131).
MISO
MOSI
SCK
SS
Doc ID 17660 Rev 1
58)
+5V
MISO
MOSI
SCK
SS
SS
, or made free for standard I/O by
MSBit
Not used if SS is managed
by software
8-BIT SHIFT REGISTER
SLAVE
ST72521xx-Auto
Figure
Write collision
LSBit
57):