ST72324BK2 STMicroelectronics, ST72324BK2 Datasheet - Page 138

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ST72324BK2

Manufacturer Part Number
ST72324BK2
Description
5V RANGE 8-BIT MCU WITH 8 TO 32K FLASH/ROM, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72324BK2

Hdflash Endurance
1 kcycle at 55 °C, data retention 40 years at 85 °C
Clock Sources
crystal/ceramic resonator oscillators, int. RC osc. and ext. clock input
4 Power Saving Modes
Slow, Wait, Active-halt, and Halt
Instruction set
138/193
Using a prebyte
The instructions are described with one to four opcodes.
In order to extend the number of available opcodes for an 8-bit CPU (256 opcodes), three
different prebyte opcodes are defined. These prebytes modify the meaning of the instruction
they precede.
The whole instruction becomes:
PC-2
PC-1
PC
PC+1
These prebytes enable the instruction in Y as well as indirect addressing modes to be
implemented. They precede the opcode of the instruction in X or the instruction using direct
addressing mode. The prebytes are:
PDY 90
PIX 92
PIY 91
Replace an X based instruction using immediate, direct, indexed, or inherent
End of previous instruction
Prebyte
Opcode
effective address
Replace an instruction using direct, direct bit, or direct relative addressing mode
to an instruction using the corresponding indirect addressing mode.
It also changes an instruction using X indexed addressing mode to an instruction
using indirect X indexed addressing mode.
Replace an instruction using X indirect indexed addressing mode by a Y one.
Additional word (0 to 2) according to the number of bytes required to compute the
addressing mode by a Y one.
ST72324Bxx

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