ST7MC1K4 STMicroelectronics, ST7MC1K4 Datasheet - Page 70

• Manufacturer Part Number: ST7MC1K4
• Description: 8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
• Manufacturer: STMicroelectronics

Specifications of ST7MC1K4

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
• Four Power Saving Modes: Halt, Active-Halt, Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
• 8-bit Pwm Auto-reload Timer With: 2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector

ST7MC1xx/ST7MC2xx
ON-CHIP PERIPHERALS (Cont’d)
Output compare and Time base interrupt
On overflow, the OVF flag of the ARTCSR register
is set and an overflow interrupt request is generat-
ed if the overflow interrupt enable bit, OIE, in the
ARTCSR register, is set. The OVF flag must be re-
set by the user software. This interrupt can be
used as a time base in the application.
Figure 42. External Event Detector Example (3 counts)
70/309
1
f
EXT
COUNTER
=f
COUNTER
OVF
FDh
FEh
ARTARR=FDh
FFh
INTERRUPT
IF OIE=1
FDh
External clock and event detector mode
Using the f
auto-reload timer can be used as an external clock
event detector. In this mode, the ARTARR register
is used to select the n
be counted before setting the OVF flag.
Caution: The external clock function is not availa-
ble in Halt mode. If Halt mode is used in the appli-
cation, prior to executing the HALT instruction, the
counter must be disabled by clearing the TCE bit
in the ARTCSR register to avoid spurious counter
increments.
ARTCSR READ
FEh
EXT
n
EVENT
FFh
external prescaler input clock, the
INTERRUPT
IF OIE=1
= 256 - ARTARR
EVENT
FDh
ARTCSR READ
number of events to
t