ST7MC1K4 STMicroelectronics, ST7MC1K4 Datasheet - Page 47

• Manufacturer Part Number: ST7MC1K4
• Description: 8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
• Manufacturer: STMicroelectronics

Specifications of ST7MC1K4

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators and by-pass for external clock, clock security system.
• Four Power Saving Modes: Halt, Active-Halt, Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
• 8-bit Pwm Auto-reload Timer With: 2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector

INTERRUPTS (Cont’d)
7.7 EXTERNAL INTERRUPT CONTROL REGISTER (EICR)
Read/Write
Reset Value: 0000 0000 (00h)
Bit 7:6 = IS1[1:0] ei2 sensitivity
The interrupt sensitivity, defined using the IS1[1:0]
bits, is applied to the following external interrupts:
- ei2 (port C3..1)
- ei2 (port C0, B7..6)
IS11 IS10
IS11 IS10
IS11
0
0
1
1
0
0
1
1
7
IS10
0
1
0
1
0
1
0
1
Falling edge only
Rising edge only
IPB
Falling edge &
IPB bit =0
low level
External Interrupt Sensitivity
External Interrupt Sensitivity
IS21
Falling edge & low level
Rising and falling edge
Rising and falling edge
Falling edge only
Rising edge only
IS20
IS31
Falling edge only
Rising edge only
Rising edge
& high level
IPB bit =1
IS30
IPA
0
These 2 bits can be written only when I1 and I0 of
the CC register are both set to 1 (level 3).
Bit 5 = IPB Interrupt polarity for port C
This bit is used to invert the sensitivity of the port
C[3:1] external interrupts. It can be set and cleared
by software only when I1 and I0 of the CC register
are both set to 1 (level 3).
0: No sensitivity inversion
1: Sensitivity inversion
Bit 4:3= IS2[1:0] ei1sensitivity
The interrupt sensitivity, defined using the IS2[1:0]
bits, is applied to the following external interrupts:
- ei1 (port A3, A5...A7)
Bit 2:1= IS3[1:0] ei0sensitivity
The interrupt sensitivity, defined using the IS2[1:0]
bits, is applied to the following external interrupts:
IS21 IS20
0
0
1
1
0
1
0
1
External Interrupt Sensitivity
Falling edge & low level
Rising and falling edge
Falling edge only
Rising edge only
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