STM32F205ZG STMicroelectronics, STM32F205ZG Datasheet - Page 165
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STM32F205ZG
Manufacturer Part Number
STM32F205ZG
Description
High-performance ARM Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator
Manufacturer
STMicroelectronics
Datasheet
1.STM32F205VE.pdf
(170 pages)
Specifications of STM32F205ZG
10/100 Ethernet Mac With Dedicated Dma
supports IEEE 1588v2 hardware, MII/RMII
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STM32F205xx, STM32F207xx
Table 93.
22-Apr-2011
Date
Document revision history (continued)
(continued)
Revision
6
Updated
well as
mode, code with data processing running from Flash memory (ART
accelerator disabled)
consumption in Run mode, code with data processing running from
Flash memory (ART accelerator enabled) or
Figure
Updated
mode, and added
Updated
mode. Added
in Stop
Updated
Standby mode
consumptions in V
Updated
Table 23: Peripheral current
Updated t
power mode wakeup
Maximum f
High-speed external user clock
Updated C and g
characteristics. Updated R
oscillator characteristics (f
Added
HSI oscillator
temperature.
Updated f
characteristics. Added
Table 31: Main PLL
jitter, IDD
maximum values.
Table 32: PLLI2S (audio PLL)
t
minimum and maximum values.
Added
Updated
Flash memory programming
and added
Modified
Updated
in
to V
Updated
Added
Modified maximum frequency values and conditions in
AC
Updated t
APB1
TIMx connected to the APB2
LOCK
Section : Electromagnetic Interference
Doc ID 15818 Rev 8
characteristics.
ESD(HBM)
, jitter, IDD
domain. Modified t
23,
Note 1
Note 1
Section 5.3.15: I/O current injection
Table 17: Typical and maximum current consumption in Run
mode.
Table 19: Typical and maximum current consumption in Sleep
Table 20: Typical and maximum current consumptions in Stop
Typical and maximum current consumption
Table 21: Typical and maximum current consumptions in
On-chip peripheral current consumption
Table 34: Flash memory
Figure 38: Recommended NRST pin
Table 39: EMI characteristics
Table 43: I/O static
(PLL)
WUSTDBY
LSI
res(TIM)
Figure
HSE_ext
Note 1
, t
in
characteristics. Added
Figure 28: Typical current consumption vs temperature
and IDD
su(LSI)
and updated ACC
in
and
Table 40: ESD absolute maximum
(PLLI2S)
Table 33: SSCG parameters
m
in
24, and
Figure 26
BAT
and minimum t
in
in
and t
Table 22: Typical and maximum current
Table 47: Characteristics of TIMx connected to the
characteristics: removed note 1, updated t
and IDD
Table 36: Flash memory programming with V
timings.
and
Table 27: HSE 4-26 MHz oscillator
mode.
A(PLL)
Figure 34: ACC
and IDD
WUSTOP
res(TIM)
Table 18: Typical and maximum current
Figure
LSE
F
, I
, added
consumption.
and
characteristics.
and added
(LSI)
2
domain.
characteristics: removed note 1, updated
= 32.768
, g
Changes
characteristics.
, and added
A(PLLI2S)
and f
HSI
Figure
m
25.
w(HSE)
in
characteristics. Modified
, and t
, IDD
Table 30: LSI oscillator
Note 2
Figure 33: ACC
EXT
LSI
and EMI monitoring conditions
kHz).
27.
values updated in
, added
Note 2
su(LSE)
(HSI
(EMI). Added
Table 48: Characteristics of
versus temperature
characteristics.
for f
, and t
Note 3
RAM. Added
constraint.
protection.
PLL_IN
in
for t
Note 3
conditions and
Table 28: LSE
ratings.
su(HSI)
prog
in
Revision history
HSI
conditions, as
Table 24: Low-
minimum and
. Updated t
Table 45: I/O
Note 2
for f
versus
in
Figure
Table 25:
Table 35:
Table 29:
PLLI2S_IN
LOCK
related
165/170
22,
PP
prog
,
.