STM32F205ZG STMicroelectronics, STM32F205ZG Datasheet - Page 124
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STM32F205ZG
Manufacturer Part Number
STM32F205ZG
Description
High-performance ARM Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator
Manufacturer
STMicroelectronics
Datasheet
1.STM32F205VE.pdf
(170 pages)
Specifications of STM32F205ZG
10/100 Ethernet Mac With Dedicated Dma
supports IEEE 1588v2 hardware, MII/RMII
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Electrical characteristics
124/170
Figure 56. Asynchronous non-multiplexed SRAM/PSRAM/NOR write waveforms
1. Mode 2/B, C and D only. In Mode 1, FSMC_NADV is not used.
Table 70.
1. C
2. Based on characterization, not tested in production.
t
t
t
t
h(Data_NWE)
t
t
v(NADV_NE)
v(NWE_NE
h(NE_NWE)
t
h(BL_NWE)
v(Data_NE)
t
Symbol
h(A_NWE)
t
t
t
v(BL_NE)
w(NADV)
w(NWE)
v(A_NE)
t
L
w(NE)
= 30 pF.
FSMC_NBL[1:0]
FSMC_NADV
FSMC_A[25:0]
FSMC_D[15:0]
FSMC_NWE
FSMC_NOE
FSMC_NEx
)
Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings
FSMC_NE low time
FSMC_NEx low to FSMC_NWE low
FSMC_NWE low time
FSMC_NWE high to FSMC_NE high hold
time
FSMC_NEx low to FSMC_A valid
Address hold time after FSMC_NWE high
FSMC_NEx low to FSMC_BL valid
FSMC_BL hold time after FSMC_NWE
high
Data to FSMC_NEx low to Data valid
Data hold time after FSMC_NWE high
FSMC_NEx low to FSMC_NADV low
FSMC_NADV low time
(1)
Parameter
t
Doc ID 15818 Rev 8
t
v(NADV_NE)
v(NWE_NE)
t
v(A_NE)
t
t
t
v(BL_NE)
w(NADV)
v(Data_NE)
Address
t
w(NE)
NBL
t
w(NWE)
t
h(Data_NWE)
t
h(BL_NWE)
t
T
T
h(A_NWE)
T
T
T
HCLK
HCLK
HCLK
3T
Data
HCLK
T
HCLK
Min
HCLK
HCLK
-
-
-
-
-
STM32F205xx, STM32F207xx
– 0.5
– 0.5
+0.5
– 1
- 3
T
T
3T
T
T
HCLK
HCLK
HCLK
HCLK
HCLK
t
Max
h(NE_NWE)
0.5
0
2
-
-
-
-
+ 0.5
+ 1.5
+ 3
+ 5
+ 4
ai14990
(1)(2)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns