STM32F205ZG STMicroelectronics, STM32F205ZG Datasheet - Page 158
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STM32F205ZG
Manufacturer Part Number
STM32F205ZG
Description
High-performance ARM Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator
Manufacturer
STMicroelectronics
Datasheet
1.STM32F205VE.pdf
(170 pages)
Specifications of STM32F205ZG
10/100 Ethernet Mac With Dedicated Dma
supports IEEE 1588v2 hardware, MII/RMII
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Application block diagrams
158/170
Figure 94. Master clock (MCK) used to drive the external audio DAC
1. I2S_SCK is the I2S serial clock to the external audio DAC (not to be confused with I2S_CK).
Figure 95. Master clock (MCK) not used to drive the external audio DAC
1. I2S_SCK is the I2S serial clock to the external audio DAC (not to be confused with I2S_CK).
I2S_CK
I2SCOM_CK
2,3,4,..,129
/I2SD
I2S controller
for 16-bit stereo
for 32-bit stereo
I2S controller
/8
/4
/I2SD
Doc ID 15818 Rev 8
/(2 x 16)
/(2 x 32)
for 16-bit stereo
for 32-bit stereo
F
F
SAUDIO
SAUDIO
/(2 x 16)
/(2 x 32)
I2S_MCK = 256 × F
I2S_SCK
= 11.2896 MHz for F
= 12.2880 MHz for F
F
F
SAUDIO
SAUDIO
STM32F205xx, STM32F207xx
(1)
= I2S_MCK/8 for 16-bit stereo
= I2S_MCK/4 for 32-bit stereo
ai16042
I2S_SCK
SAUDIO
SAUDIO
SAUDIO
= 44.1 kHz
(1)
= 48.0 kHz
ai16042