P89LPC932A1 NXP Semiconductors, P89LPC932A1 Datasheet - Page 33
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P89LPC932A1
Manufacturer Part Number
P89LPC932A1
Description
The P89LPC932A1 is a single-chip microcontroller, available in low cost packages, basedon a high performance processor architecture that executes instructions in two to fourclocks, six times the rate of standard 80C51 devices
Manufacturer
NXP Semiconductors
Datasheet
1.P89LPC932A1.pdf
(64 pages)
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NXP Semiconductors
P89LPC932A1_3
Product data sheet
7.21 I
The I
connected to the bus, and it has the following features:
A typical I
a byte-oriented I
2
Fig 14. I
•
•
•
•
•
•
C-bus serial interface
Bidirectional data transfer between masters and slaves.
Multi master bus (no central master).
Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus.
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus.
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer.
The I
2
C-bus uses two wires (SDA and SCL) to transfer information between devices
2
2
2
C-bus configuration
C-bus may be used for test and diagnostic purposes.
C-bus configuration is shown in
I
2
C-bus
2
C-bus interface that supports data transfers up to 400 kHz.
P1.3/SDA
Rev. 03 — 12 March 2007
P89LPC932A1
8-bit microcontroller with accelerated two-clock 80C51 core
P1.2/SCL
OTHER DEVICE
WITH I
R
Figure
INTERFACE
P
2
C-BUS
14. The P89LPC932A1 device provides
R
P
OTHER DEVICE
P89LPC932A1
WITH I
INTERFACE
2
C-BUS
002aaa898
© NXP B.V. 2007. All rights reserved.
SDA
SCL
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