P89LPC932A1 NXP Semiconductors, P89LPC932A1 Datasheet - Page 21

• Manufacturer Part Number: P89LPC932A1
• Description: The P89LPC932A1 is a single-chip microcontroller, available in low cost packages, basedon a high performance processor architecture that executes instructions in two to fourclocks, six times the rate of standard 80C51 devices
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 5.
P89LPC932A1_3
Product data sheet
Clock source
On-chip oscillator or watchdog oscillator
Fig 8. Interrupt sources, interrupt enables, and power-down wake-up sources
(1) See
(RTCCON.1)
Number of I/O pins available
WDOVF
Section 7.19 “CCU”
RTCF
ERTC
7.13 I/O ports
In edge-triggered mode, if successive samples of the INTn pin show a HIGH in one cycle
and a LOW in the next cycle, the interrupt request flag IEn in TCON is set, causing an
interrupt request.
If an external interrupt is enabled when the P89LPC932A1 is put into Power-down or Idle
mode, the interrupt will cause the processor to wake-up and resume operation. Refer to
Section 7.15 “Power reduction modes”
The P89LPC932A1 has four I/O ports: Port 0, Port 1, Port 2, and Port 3. Ports 0, 1 and 2
are 8-bit ports, and Port 3 is a 2-bit port. The exact number of I/O pins available depends
upon the clock and reset options chosen, as shown in
any CCU interrupt
EA (IE0.7)
TI & RI/RI
ES/ESR
EWDRT
ECCU
CMF2
CMF1
KBIF
EKBI
EI2C
SPIF
ESPI
EEIF
EIEE
BOF
EBO
EST
EX0
EX1
ET0
ET1
TF0
TF1
IE0
IE1
EC
(1)
SI
TI
Reset option
No external reset (except during power-up)
External RST pin supported
Rev. 03 — 12 March 2007
8-bit microcontroller with accelerated two-clock 80C51 core
for details.
Table
P89LPC932A1
002aaa892
5.
Number of I/O pins
(28-pin package)
26
25
interrupt
to CPU
wake-up
(if in power-down)
© NXP B.V. 2007. All rights reserved.
21 of 64